Fix issue with delay slot filler and microMIPS

[zoran.jovanovic]

Summary

Patch temporarily fixes issue with 16b microMIPS instructions in delay slot of call instructions.

[sstankovic]

LGTM

Closed by commit rL221612 (authored by zjovanovic).

llvm/trunk/lib/Target/Mips/MipsDelaySlotFiller.cpp

getUnderlyingObjects(const MachineInstr &MI,
 
   return true;
 }
 
 /// runOnMachineBasicBlock - Fill in delay slots for the given basic block.
 /// We assume there is only one delay slot per delayed instruction.
 bool Filler::runOnMachineBasicBlock(MachineBasicBlock &MBB) {
   bool Changed = false;
+  bool InMicroMipsMode = TM.getSubtarget<MipsSubtarget>().inMicroMipsMode();
 
   for (Iter I = MBB.begin(); I != MBB.end(); ++I) {
     if (!hasUnoccupiedSlot(&*I))
       continue;
 
+    // For microMIPS, at the moment, do not fill delay slots of call
+    // instructions.
+    //
+    // TODO: Support for replacing regular call instructions with corresponding
+    // short delay slot instructions should be implemented.
+    if (!InMicroMipsMode || !I->isCall()) {
       ++FilledSlots;
       Changed = true;
 
       // Delay slot filling is disabled at -O0.
       if (!DisableDelaySlotFiller && (TM.getOptLevel() != CodeGenOpt::None)) {
         if (searchBackward(MBB, I))
           continue;
 
         if (I->isTerminator()) {
           if (searchSuccBBs(MBB, I))
             continue;
         } else if (searchForward(MBB, I)) {
           continue;
         }
       }
+    }
 
     // Bundle the NOP to the instruction with the delay slot.
     const MipsInstrInfo *TII = static_cast<const MipsInstrInfo *>(
         TM.getSubtargetImpl()->getInstrInfo());
     BuildMI(MBB, std::next(I), I->getDebugLoc(), TII->get(Mips::NOP));
     MIBundleBuilder(MBB, I, std::next(I, 2));
   }
 

llvm/trunk/test/CodeGen/Mips/micromips-delay-slot.ll

+; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \
+; RUN:   -relocation-model=pic -O3 < %s | FileCheck %s
+
+; Function Attrs: nounwind uwtable
+define i32 @foo(i32 %a) #0 {
+entry:
+  %a.addr = alloca i32, align 4
+  store i32 %a, i32* %a.addr, align 4
+  %0 = load i32* %a.addr, align 4
+  %shl = shl i32 %0, 2
+  %call = call i32 @bar(i32 %shl)
+  ret i32 %call
+}
+
+declare i32 @bar(i32) #1
+
+; CHECK: nop
+