Fix typos in comments, NFC

[morisset]

Summary

Just fixing comments, no functional change.

[jfb]

Looks good save for one place. Feel free to fix and commit.

include/llvm/CodeGen/MachinePostDominators.h

25 ↗

(On Diff #13106)

?

[morisset]

Fix mistake pointed by jfb.

[morisset]

Closed by commit rL216784 (authored by @morisset).

llvm/trunk/docs/ProgrammersManual.rst

 ``ilist_traits<T>`` is a public base of this class and can be used for a wide
 variety of customizations.
 
 .. _dss_ilist_node:
 
 llvm/ADT/ilist_node.h
 ^^^^^^^^^^^^^^^^^^^^^
 
-``ilist_node<T>`` implements a the forward and backward links that are expected
+``ilist_node<T>`` implements the forward and backward links that are expected
 by the ``ilist<T>`` (and analogous containers) in the default manner.
 
 ``ilist_node<T>``\ s are meant to be embedded in the node type ``T``, usually
 ``T`` publicly derives from ``ilist_node<T>``.
 
 .. _dss_ilist_sentinel:
 
 Sentinels

llvm/trunk/include/llvm/Analysis/LazyCallGraph.h

 /// \brief An analysis pass which computes the call graph for a module.
 class LazyCallGraphAnalysis {
 public:
   /// \brief Inform generic clients of the result type.
   typedef LazyCallGraph Result;
 
   static void *ID() { return (void *)&PassID; }
 
-  /// \brief Compute the \c LazyCallGraph for a the module \c M.
+  /// \brief Compute the \c LazyCallGraph for the module \c M.
   ///
   /// This just builds the set of entry points to the call graph. The rest is
   /// built lazily as it is walked.
   LazyCallGraph run(Module *M) { return LazyCallGraph(*M); }
 
 private:
   static char PassID;
 };

llvm/trunk/include/llvm/Analysis/PostDominators.h

 #ifndef LLVM_ANALYSIS_POSTDOMINATORS_H
 #define LLVM_ANALYSIS_POSTDOMINATORS_H
 
 #include "llvm/IR/Dominators.h"
 
 namespace llvm {
 
 /// PostDominatorTree Class - Concrete subclass of DominatorTree that is used to
-/// compute the a post-dominator tree.
+/// compute the post-dominator tree.
 ///
 struct PostDominatorTree : public FunctionPass {
   static char ID; // Pass identification, replacement for typeid
   DominatorTreeBase<BasicBlock>* DT;
 
   PostDominatorTree() : FunctionPass(ID) {
     initializePostDominatorTreePass(*PassRegistry::getPassRegistry());
     DT = new DominatorTreeBase<BasicBlock>(true);

llvm/trunk/include/llvm/Analysis/TargetTransformInfo.h

public:
   ///
   /// The idea is to test whether the program is likely to require a 'call'
   /// instruction or equivalent in order to call the given function.
   ///
   /// FIXME: It's not clear that this is a good or useful query API. Client's
   /// should probably move to simpler cost metrics using the above.
   /// Alternatively, we could split the cost interface into distinct code-size
   /// and execution-speed costs. This would allow modelling the core of this
-  /// query more accurately as the a call is a single small instruction, but
+  /// query more accurately as a call is a single small instruction, but
   /// incurs significant execution cost.
   virtual bool isLoweredToCall(const Function *F) const;
 
   /// Parameters that control the generic loop unrolling transformation.
   struct UnrollingPreferences {
     /// The cost threshold for the unrolled loop, compared to
     /// CodeMetrics.NumInsts aggregated over all basic blocks in the loop body.
     /// The unrolling factor is set such that the unrolled loop body does not

llvm/trunk/include/llvm/CodeGen/MachinePostDominators.h

 
 #include "llvm/CodeGen/MachineDominators.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 
 namespace llvm {
 
 ///
 /// PostDominatorTree Class - Concrete subclass of DominatorTree that is used
-/// to compute the a post-dominator tree.
+/// to compute the post-dominator tree.
 ///
 struct MachinePostDominatorTree : public MachineFunctionPass {
 private:
   DominatorTreeBase<MachineBasicBlock> *DT;
 
 public:
   static char ID;
 

llvm/trunk/include/llvm/CodeGen/SelectionDAG.h

#endif
   }
 
   /// getVAArg - VAArg produces a result and token chain, and takes a pointer
   /// and a source value as input.
   SDValue getVAArg(EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr,
                    SDValue SV, unsigned Align);
 
   /// getAtomicCmpSwap - Gets a node for an atomic cmpxchg op. There are two
-  /// valid Opcodes. ISD::ATOMIC_CMO_SWAP produces a the value loaded and a
+  /// valid Opcodes. ISD::ATOMIC_CMO_SWAP produces the value loaded and a
   /// chain result. ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS produces the value loaded,
   /// a success flag (initially i1), and a chain.
   SDValue getAtomicCmpSwap(unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs,
                            SDValue Chain, SDValue Ptr, SDValue Cmp, SDValue Swp,
                            MachinePointerInfo PtrInfo, unsigned Alignment,
                            AtomicOrdering SuccessOrdering,
                            AtomicOrdering FailureOrdering,
                            SynchronizationScope SynchScope);

llvm/trunk/include/llvm/IR/IRBuilder.h

 /// instructions.  For access to extra instruction properties, use the mutators
 /// (e.g. setVolatile) on the instructions after they have been
 /// created. Convenience state exists to specify fast-math flags and fp-math
 /// tags.
 ///
 /// The first template argument handles whether or not to preserve names in the
 /// final instruction output. This defaults to on.  The second template argument
 /// specifies a class to use for creating constants.  This defaults to creating
-/// minimally folded constants.  The fourth template argument allows clients to
+/// minimally folded constants.  The third template argument allows clients to
 /// specify custom insertion hooks that are called on every newly created
 /// insertion.
 template<bool preserveNames = true, typename T = ConstantFolder,
          typename Inserter = IRBuilderDefaultInserter<preserveNames> >
 class IRBuilder : public IRBuilderBase, public Inserter {
   T Folder;
 public:
   IRBuilder(LLVMContext &C, const T &F, const Inserter &I = Inserter(),

llvm/trunk/include/llvm/IR/Instructions.h

public:
 
   /// \brief Return true if this alloca is used as an inalloca argument to a
   /// call.  Such allocas are never considered static even if they are in the
   /// entry block.
   bool isUsedWithInAlloca() const {
     return getSubclassDataFromInstruction() & 32;
   }
 
-  /// \brief Specify whether this alloca is used to represent a the arguments to
+  /// \brief Specify whether this alloca is used to represent the arguments to
   /// a call.
   void setUsedWithInAlloca(bool V) {
     setInstructionSubclassData((getSubclassDataFromInstruction() & ~32) |
                                (V ? 32 : 0));
   }
 
   // Methods for support type inquiry through isa, cast, and dyn_cast:
   static inline bool classof(const Instruction *I) {

llvm/trunk/include/llvm/IR/Type.h

public:
   subtype_reverse_iterator subtype_rbegin() const {
     return subtype_reverse_iterator(subtype_end());
   }
   subtype_reverse_iterator subtype_rend() const {
     return subtype_reverse_iterator(subtype_begin());
   }
 
   /// getContainedType - This method is used to implement the type iterator
-  /// (defined a the end of the file).  For derived types, this returns the
+  /// (defined at the end of the file).  For derived types, this returns the
   /// types 'contained' in the derived type.
   ///
   Type *getContainedType(unsigned i) const {
     assert(i < NumContainedTys && "Index out of range!");
     return ContainedTys[i];
   }
 
   /// getNumContainedTypes - Return the number of types in the derived type.

llvm/trunk/include/llvm/MC/MCAsmInfo.h

protected:
   /// directive for emitting BSS Symbols.  Default is false.
   bool HasMachoZeroFillDirective;
 
   /// True if this is a MachO target that supports the macho-specific .tbss
   /// directive for emitting thread local BSS Symbols.  Default is false.
   bool HasMachoTBSSDirective;
 
   /// True if the compiler should emit a ".reference .constructors_used" or
-  /// ".reference .destructors_used" directive after the a static ctor/dtor
+  /// ".reference .destructors_used" directive after the static ctor/dtor
   /// list.  This directive is only emitted in Static relocation model.  Default
   /// is false.
   bool HasStaticCtorDtorReferenceInStaticMode;
 
   /// True if the linker has a bug and requires that the debug_line section be
   /// of a minimum size. In practice such a linker requires a non-empty line
   /// sequence if a file is present.  Default to false.
   bool LinkerRequiresNonEmptyDwarfLines;

llvm/trunk/lib/Analysis/MemoryDependenceAnalysis.cpp

GetNonLocalInfoForBlock(const AliasAnalysis::Location &Loc,
   // update MemDep when we remove instructions.
   Instruction *Inst = Dep.getInst();
   assert(Inst && "Didn't depend on anything?");
   ValueIsLoadPair CacheKey(Loc.Ptr, isLoad);
   ReverseNonLocalPtrDeps[Inst].insert(CacheKey);
   return Dep;
 }
 
-/// SortNonLocalDepInfoCache - Sort the a NonLocalDepInfo cache, given a certain
+/// SortNonLocalDepInfoCache - Sort the NonLocalDepInfo cache, given a certain
 /// number of elements in the array that are already properly ordered.  This is
 /// optimized for the case when only a few entries are added.
 static void
 SortNonLocalDepInfoCache(MemoryDependenceAnalysis::NonLocalDepInfo &Cache,
                          unsigned NumSortedEntries) {
   switch (Cache.size() - NumSortedEntries) {
   case 0:
     // done, no new entries.

llvm/trunk/lib/Analysis/ScalarEvolutionNormalization.cpp

if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
     case NormalizeAutodetect:
       // Normalize this SCEV by subtracting the expression for the final step.
       // We only allow affine AddRecs to be normalized, otherwise we would not
       // be able to correctly denormalize.
       // e.g. {1,+,3,+,2} == {-2,+,1,+,2} + {3,+,2}
       // Normalized form:   {-2,+,1,+,2}
       // Denormalized form: {1,+,3,+,2}
       //
-      // However, denormalization would use the a different step expression than
+      // However, denormalization would use a different step expression than
       // normalization (see getPostIncExpr), generating the wrong final
       // expression: {-2,+,1,+,2} + {1,+,2} => {-1,+,3,+,2}
       if (AR->isAffine() &&
           IVUseShouldUsePostIncValue(User, OperandValToReplace, L, &DT)) {
         const SCEV *TransformedStep =
           TransformSubExpr(AR->getStepRecurrence(SE),
                            User, OperandValToReplace);
         Result = SE.getMinusSCEV(Result, TransformedStep);

llvm/trunk/lib/AsmParser/LLParser.cpp

for (unsigned i = 0, e = ArgList.size(); i != e; ++i, ++ArgIt) {
     if (ArgIt->getName() != ArgList[i].Name)
       return Error(ArgList[i].Loc, "redefinition of argument '%" +
                    ArgList[i].Name + "'");
   }
 
   if (isDefine)
     return false;
 
-  // Check the a declaration has no block address forward references.
+  // Check the declaration has no block address forward references.
   ValID ID;
   if (FunctionName.empty()) {
     ID.Kind = ValID::t_GlobalID;
     ID.UIntVal = NumberedVals.size() - 1;
   } else {
     ID.Kind = ValID::t_GlobalName;
     ID.StrVal = FunctionName;
   }

llvm/trunk/lib/CodeGen/AsmPrinter/DIEHash.cpp

void DIEHash::hashDIEEntry(dwarf::Attribute Attribute, dwarf::Tag Tag,
   }
 
   unsigned &DieNumber = Numbering[&Entry];
   if (DieNumber) {
     hashRepeatedTypeReference(Attribute, DieNumber);
     return;
   }
 
-  // otherwise, b) use the letter 'T' as a the marker, ...
+  // otherwise, b) use the letter 'T' as the marker, ...
   addULEB128('T');
 
   addULEB128(Attribute);
 
   // ... process the type T recursively by performing Steps 2 through 7, and
   // use the result as the attribute value.
   DieNumber = Numbering.size();
   computeHash(Entry);

llvm/trunk/lib/CodeGen/StackColoring.cpp

for (unsigned i=0; i < BlockInfo.LiveOut.size(); ++i)
       DEBUG(dbgs()<<BlockInfo.LiveOut.test(i)<<" ");
     DEBUG(dbgs()<<"}\n");
   }
 }
 
 unsigned StackColoring::collectMarkers(unsigned NumSlot) {
   unsigned MarkersFound = 0;
   // Scan the function to find all lifetime markers.
-  // NOTE: We use the a reverse-post-order iteration to ensure that we obtain a
+  // NOTE: We use a reverse-post-order iteration to ensure that we obtain a
   // deterministic numbering, and because we'll need a post-order iteration
   // later for solving the liveness dataflow problem.
   for (MachineBasicBlock *MBB : depth_first(MF)) {
 
     // Assign a serial number to this basic block.
     BasicBlocks[MBB] = BasicBlockNumbering.size();
     BasicBlockNumbering.push_back(MBB);
 

llvm/trunk/lib/ExecutionEngine/JIT/JITMemoryManager.cpp

 /// For free blocks, make sure they're in the free list and that their end of
 /// block size marker is correct.  This function should return an error before
 /// accessing bad memory.  This function is defined here instead of in
 /// JITMemoryManagerTest.cpp so that we don't have to expose all of the
 /// implementation details of DefaultJITMemoryManager.
 bool DefaultJITMemoryManager::CheckInvariants(std::string &ErrorStr) {
   raw_string_ostream Err(ErrorStr);
 
-  // Construct a the set of FreeRangeHeader pointers so we can query it
+  // Construct the set of FreeRangeHeader pointers so we can query it
   // efficiently.
   llvm::SmallPtrSet<MemoryRangeHeader*, 16> FreeHdrSet;
   FreeRangeHeader* FreeHead = FreeMemoryList;
   FreeRangeHeader* FreeRange = FreeHead;
 
   do {
     // Check that the free range pointer is in the blocks we've allocated.
     bool Found = false;

llvm/trunk/lib/IR/DiagnosticPrinter.cpp

 //===- llvm/Support/DiagnosticInfo.cpp - Diagnostic Definitions -*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
-// This file defines the a diagnostic printer relying on raw_ostream.
+// This file defines a diagnostic printer relying on raw_ostream.
 //
 //===----------------------------------------------------------------------===//
 
 #include "llvm/ADT/Twine.h"
 #include "llvm/IR/DiagnosticPrinter.h"
 #include "llvm/IR/Module.h"
 #include "llvm/IR/Value.h"
 #include "llvm/Support/raw_ostream.h"

llvm/trunk/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp

case ISD::SRA:
     return AArch64_AM::ASR;
   case ISD::ROTR:
     return AArch64_AM::ROR;
   }
 }
 
 /// \brief Determine wether it is worth to fold V into an extended register.
 bool AArch64DAGToDAGISel::isWorthFolding(SDValue V) const {
-  // it hurts if the a value is used at least twice, unless we are optimizing
+  // it hurts if the value is used at least twice, unless we are optimizing
   // for code size.
   if (ForCodeSize || V.hasOneUse())
     return true;
   return false;
 }
 
 /// SelectShiftedRegister - Select a "shifted register" operand.  If the value
 /// is not shifted, set the Shift operand to default of "LSL 0".  The logical

llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.h

 class AArch64TargetMachine;
 
 class AArch64TargetLowering : public TargetLowering {
   bool RequireStrictAlign;
 
 public:
   explicit AArch64TargetLowering(TargetMachine &TM);
 
-  /// Selects the correct CCAssignFn for a the given CallingConvention
-  /// value.
+  /// Selects the correct CCAssignFn for a given CallingConvention value.
   CCAssignFn *CCAssignFnForCall(CallingConv::ID CC, bool IsVarArg) const;
 
   /// computeKnownBitsForTargetNode - Determine which of the bits specified in
   /// Mask are known to be either zero or one and return them in the
   /// KnownZero/KnownOne bitsets.
   void computeKnownBitsForTargetNode(const SDValue Op, APInt &KnownZero,
                                      APInt &KnownOne, const SelectionDAG &DAG,
                                      unsigned Depth = 0) const override;

llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp

 }
 
 //===----------------------------------------------------------------------===//
 //                      Calling Convention Implementation
 //===----------------------------------------------------------------------===//
 
 #include "AArch64GenCallingConv.inc"
 
-/// Selects the correct CCAssignFn for a the given CallingConvention
-/// value.
+/// Selects the correct CCAssignFn for a given CallingConvention value.
 CCAssignFn *AArch64TargetLowering::CCAssignFnForCall(CallingConv::ID CC,
                                                      bool IsVarArg) const {
   switch (CC) {
   default:
     llvm_unreachable("Unsupported calling convention.");
   case CallingConv::WebKit_JS:
     return CC_AArch64_WebKit_JS;
   case CallingConv::C:

llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp

 }
 
 // Return the number of 32-bit words loaded by LDM or stored by STM. If this
 // can't be easily determined return 0 (missing MachineMemOperand).
 //
 // FIXME: The current MachineInstr design does not support relying on machine
 // mem operands to determine the width of a memory access. Instead, we expect
 // the target to provide this information based on the instruction opcode and
-// operands. However, using MachineMemOperand is a the best solution now for
+// operands. However, using MachineMemOperand is the best solution now for
 // two reasons:
 //
 // 1) getNumMicroOps tries to infer LDM memory width from the total number of MI
 // operands. This is much more dangerous than using the MachineMemOperand
 // sizes because CodeGen passes can insert/remove optional machine operands. In
 // fact, it's totally incorrect for preRA passes and appears to be wrong for
 // postRA passes as well.
 //

llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td

 
 def: Mips16Pat
   <(setge CPU16Regs:$lhs, CPU16Regs:$rhs),
    (XorRxRxRy16 (SltCCRxRy16 CPU16Regs:$lhs, CPU16Regs:$rhs),
    (LiRxImmX16 1))>;
 
 //
 // For constants, llvm transforms this to:
-// x > (k -1) and then reverses the operands to use setlt. So this pattern
+// x > (k - 1) and then reverses the operands to use setlt. So this pattern
 // is not used now by the compiler. (Presumably checking that k-1 does not
-// overflow). The compiler never uses this at a the current time, due to
+// overflow). The compiler never uses this at the current time, due to
 // other optimizations.
 //
 //def: Mips16Pat
 //  <(setge CPU16Regs:$lhs, immSExt16:$rhs),
 //   (XorRxRxRy16 (SltiCCRxImmX16 CPU16Regs:$lhs, immSExt16:$rhs),
 //   (LiRxImmX16 1))>;
 
 // This catches the x >= -32768 case by transforming it to  x > -32769

llvm/trunk/test/CodeGen/X86/2013-10-14-FastISel-incorrect-vreg.ll

 ; RUN: llc -mtriple x86_64-apple-darwin -O0 < %s -o - | FileCheck %s
 ;
 ; During X86 fastisel, the address of indirect call was resolved
 ; through bitcast, ptrtoint, and inttoptr instructions. This is valid
 ; only if the related instructions are in that same basic block, otherwise
 ; we may reference variables that were not live across basic blocks
 ; resulting in undefined virtual registers.
 ;
-; In this example, this is illustrated by a the spill/reload of the
+; In this example, this is illustrated by a spill/reload of the
 ; LOADED_PTR_SLOT.
 ;
 ; Before this patch, the compiler was accessing two different spill
 ; slots.
 ; <rdar://problem/15192473>
 
 ; CHECK-LABEL: @test_bitcast
 ; Load the value of the function pointer: %loaded_ptr

llvm/trunk/test/MC/ELF/comdat.s

 // RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -t | FileCheck %s
 
-// Test that we produce the group sections and that they are a the beginning
+// Test that we produce the group sections and that they are at the beginning
 // of the file.
 
 // CHECK:        Section {
 // CHECK:          Index: 1
 // CHECK-NEXT:     Name: .group
 // CHECK-NEXT:     Type: SHT_GROUP
 // CHECK-NEXT:     Flags [
 // CHECK-NEXT:     ]

llvm/trunk/utils/TableGen/DAGISelMatcherOpt.cpp

 /// SinkPatternPredicates - Pattern predicates can be checked at any level of
 /// the matching tree.  The generator dumps them at the top level of the pattern
 /// though, which prevents factoring from being able to see past them.  This
 /// optimization sinks them as far down into the pattern as possible.
 ///
 /// Conceptually, we'd like to sink these predicates all the way to the last
 /// matcher predicate in the series.  However, it turns out that some
 /// ComplexPatterns have side effects on the graph, so we really don't want to
-/// run a the complex pattern if the pattern predicate will fail.  For this
+/// run a complex pattern if the pattern predicate will fail.  For this
 /// reason, we refuse to sink the pattern predicate past a ComplexPattern.
 ///
 static void SinkPatternPredicates(std::unique_ptr<Matcher> &MatcherPtr) {
   // Recursively scan for a PatternPredicate.
   // If we reached the end of the chain, we're done.
   Matcher *N = MatcherPtr.get();
   if (!N) return;