Make sure to set trunc store action to Expand for all X86 targets.

[luqmana]

Summary

When compiling without SSE2, isTruncStoreLegal(F64, F32) would return Legal, whereas with SSE2 it would return Expand. And since the Target doesn't seem to actually handle a truncstore for double -> float, it would just output a store of a full double in the space for a float hence overwriting other bits on the stack.

define void @bar() unnamed_addr {
entry-block:
  %a = alloca double
  %b = alloca float

  store double 3.140000e+00, double* %a
  %0 = load double* %a

  %1 = fptrunc double %0 to float
  store float %1, float* %b

  ret void
}

Without SSE2:

bar:                                    # @bar
    .cfi_startproc
# BB#0:                                 # %entry-block
    subl    $20, %esp
.Ltmp0:
    .cfi_def_cfa_offset 24
    movl    $1074339512, 12(%esp)   # imm = 0x40091EB8
    movl    $1374389535, 8(%esp)    # imm = 0x51EB851F                 0x40091EB851EB851F (double) 3.14
    movl    $1074339512, 8(%esp)    # imm = 0x40091EB8
    movl    $1374389535, 4(%esp)    # imm = 0x51EB851F
    addl    $20, %esp
    retl

With SSE2:

bar:                                    # @bar
    .cfi_startproc
# BB#0:                                 # %entry-block
    subl    $20, %esp
.Ltmp0:
    .cfi_def_cfa_offset 24
    movl    $1074339512, 12(%esp)   # imm = 0x40091EB8
    movl    $1374389535, 8(%esp)    # imm = 0x51EB851F            0x40091EB851EB851F (double) 3.14
    movl    $1078523331, 4(%esp)    # imm = 0x4048F5C3           0x4048F5C3 (float) 3.14
    addl    $20, %esp
    retl

[luqmana]

Ping?

[luqmana]

Cool thanks! Could someone commit this for me?

lib/Target/X86/X86ISelLowering.cpp

void X86TargetLowering::resetOperationActions() {
   // We don't accept any truncstore of integer registers.
   setTruncStoreAction(MVT::i64, MVT::i32, Expand);
   setTruncStoreAction(MVT::i64, MVT::i16, Expand);
   setTruncStoreAction(MVT::i64, MVT::i8 , Expand);
   setTruncStoreAction(MVT::i32, MVT::i16, Expand);
   setTruncStoreAction(MVT::i32, MVT::i8 , Expand);
   setTruncStoreAction(MVT::i16, MVT::i8,  Expand);
 
+  setTruncStoreAction(MVT::f64, MVT::f32, Expand);
+
   // SETOEQ and SETUNE require checking two conditions.
   setCondCodeAction(ISD::SETOEQ, MVT::f32, Expand);
   setCondCodeAction(ISD::SETOEQ, MVT::f64, Expand);
   setCondCodeAction(ISD::SETOEQ, MVT::f80, Expand);
   setCondCodeAction(ISD::SETUNE, MVT::f32, Expand);
   setCondCodeAction(ISD::SETUNE, MVT::f64, Expand);
   setCondCodeAction(ISD::SETUNE, MVT::f80, Expand);
 
for (int i = MVT::v16i8; i != MVT::v2i64; ++i) {
       setOperationAction(ISD::XOR,    VT, Promote);
       AddPromotedToType (ISD::XOR,    VT, MVT::v2i64);
       setOperationAction(ISD::LOAD,   VT, Promote);
       AddPromotedToType (ISD::LOAD,   VT, MVT::v2i64);
       setOperationAction(ISD::SELECT, VT, Promote);
       AddPromotedToType (ISD::SELECT, VT, MVT::v2i64);
     }
 
-    setTruncStoreAction(MVT::f64, MVT::f32, Expand);
-
     // Custom lower v2i64 and v2f64 selects.
     setOperationAction(ISD::LOAD,               MVT::v2f64, Legal);
     setOperationAction(ISD::LOAD,               MVT::v2i64, Legal);
     setOperationAction(ISD::SELECT,             MVT::v2f64, Custom);
     setOperationAction(ISD::SELECT,             MVT::v2i64, Custom);
 
     setOperationAction(ISD::FP_TO_SINT,         MVT::v4i32, Legal);
     setOperationAction(ISD::SINT_TO_FP,         MVT::v4i32, Legal);

test/CodeGen/X86/dont-trunc-store-double-to-float.ll

+; RUN: llc -march=x86 < %s | FileCheck %s
+
+; CHECK-LABEL: @bar
+; CHECK: movl $1074339512,
+; CHECK: movl $1374389535,
+; CHECK: movl $1078523331,
+define void @bar() unnamed_addr {
+entry-block:
+  %a = alloca double
+  %b = alloca float
+
+  store double 3.140000e+00, double* %a
+  %0 = load double* %a
+
+  %1 = fptrunc double %0 to float
+
+  store float %1, float* %b
+
+  ret void
+}