[compiler-rt][builtins][MIPS] Add mips16 wrappers for float arithmetic, comparison and conversion

[farazs]

Summary

This patch adds mips16 wrappers for floating-point arithmetic, comparison and type-conversion operations.

Background: mips16 code is not aware of floating point registers and call-conventions. For platforms equipped with hardware floating point, mips16 code resorts to calling an appropriate libgcc function with the float arguments in general purpose registers. The low-level function copies the arguments to FP registers, performs the operation and returns the result to the caller in a GP register.

Operations provided in this patch are:
Arithmetic(single & double precision): add, sub, mul, div
Comparison(single & double precision): eq, ne, gt, ge, lt, le, unord
Type conversions:

• To signed integer: fix_truncXfsi
• To float: floatunsiXf, floatsiXf
• Within float formats: truncdfsf, extendsfdf

Patch for unit tests is: http://reviews.llvm.org/D4453

[samsonov]

CMake changes look fine. I don't really know anything about MIPS, so it would be great to get a quick look from someone knowledgeable. Daniel?

[dsanders]

lib/builtins/mips/mips16_cmpdf2.c

27–33

Shouldn't gtdf2 and gedf2 be the same function and return -2, -1, 0, or 1 for unordered, less-than, equal, or greater-than respectively (like glibc's soft float does)?

Similarly for ltdf2/ledf2 and the single precision equivalents.

lib/builtins/mips/mips16_gen.h

13–15

I understand what you mean but I think this ought to explain that the soft-fp wrappers make hardware floating point available to MIPS16 despite MIPS16 not supporting hardware floating point by temporarily switching the instruction set.

The header comments in the other files should mention this too.

23–24

This doesn't look right to me. Why not test using '#if !defined(mips16) || defined(mips_soft_float)'?

Also, I think it's easier to understand if the content of mips16_*.c is wrapped in an '#if defined(__mips16)' rather than defining a macro to expand to nothing.

[farazs]

Mostly agreed, further inputs on first point?

lib/builtins/mips/mips16_cmpdf2.c

27–33

I've used only this document as my reference.
Excerpt: `Do not rely on this implementation; only the semantics documented below are guaranteed. `

It seems like glibc's strategy is what is best-suited for a pure soft-float, whereas this implementation relies directly on the h/w comparison operations. As an example, this version doesn't need to check ordered-ness for every comparison operation because the underlying h/w operation takes care of it.

Do you foresee any disadvantages with this approach? I could compare space & time for both implementations, just to make sure we're not losing out.

lib/builtins/mips/mips16_gen.h

13–15

How about this (appropriately modified for all source files):

This file contains generator macros for soft-fp wrappers to make hardware 
floating point available to MIPS16 code by temporarily switching the instruction set.
These wrappers accept arguments and produce results in GP registers, but may 
perform the underlying operation using floating point instructions and registers.

23–24

Agreed on both counts.

[dsanders]

lib/builtins/mips/mips16_cmpdf2.c

27–33

Ah ok. I was looking at the comments in the implementation. Your current code looks correct to me.

Do you foresee any disadvantages with this approach?

Given that it's not needed for correctness, I believe matching glibc's soft-float would reduce performance with little or no improvement to code-size.

lib/builtins/mips/mips16_gen.h

13–15

Yes, that's ideal

[farazs]

lib/builtins/mips/mips16_gen.h

23–24

After deeper inspection, using defined(mips16) is not suitable, because the library does not always need to be built in mips16 mode. The check is based on:

1. if an application built with -mips16 can link with _this_ library. For example, if the library uses micromips or an ABI other than o32/o64, then a mips16 application will fail to link with it. I need to add a check for ABI.
2. if the function needs to be defined. For example, all soft-fp wrappers are by definition redundant in soft-float mode as the compiler will never generate calls to those wrappers. Similarly, double-precision wrappers are redundant when building with -msingle-float -- this check needs to be added as well.

I could get rid of the empty-macros by conditionally #defining MIPS16_COMPAT in mips16_gen.h and wrapping contents of mips16_*.c in #ifdef MIPS16_COMPAT. Will include this and other changes in the next revision.

[dsanders]

lib/builtins/mips/mips16_gen.h

23–24

After deeper inspection, using defined(mips16) is not suitable, because the library does not always need to be built in mips16 mode.

Do you mean the library has to provide these functions regardless of the options used to compile the library just in case it is linked against a MIPS16 object/function that references them?

if an application built with -mips16 can link with _this_ library. For example, if the library uses micromips or an
ABI other than o32/o64, then a mips16 application will fail to link with it.

microMIPS and MIPS16 cannot coexist so you don't need to deal with that case. From the microMIPS spec:

microMIPS is the preferred replacement for MIPS16e. Therefore these two schemes never co-exist within the
same processor core

and later in the same document they both use the same ISA mode value:

The MIPS Release 3 architecture defines an ISA mode for each processor. An ISA mode value of 0 indicates MIPS32
instruction decoding. In processors implementing microMIPS32, an ISA mode value of 1 selects microMIPS32
instruction decoding. In processors implementing the MIPS16e ASE, an ISA mode value of 1 selects the decoding of
instructions as MIPS16e

Regarding the ABI comment: You can't check for mixing objects with different ABI's at compile-time. That needs to be a link-time check so you don't need to deal with that case in your code.

if the function needs to be defined. For example, all soft-fp wrappers are by definition redundant
in soft-float mode as the compiler will never generate calls to those wrappers. Similarly,
double-precision wrappers are redundant when building with -msingle-float -- this check needs
to be added as well.

You generally don't need a check to cover the cases where they are redundant. If they exist but the objects they are in are not referenced in some way then they won't be included in a link.

[farazs]

lib/builtins/mips/mips16_gen.h

23–24

After deeper inspection, using defined(mips16) is not suitable, because the library does not always need to be built in mips16 mode.

Do you mean the library has to provide these functions regardless of the options used to compile the library just in case it is linked against a MIPS16 object/function that references them?

Yes. These functions should be present by default, excluding specific cases where we know they are not needed or will not work. Excluded cases would be more obvious if the implementation were in assembly (as it is for libgcc) because they would either fail to build or behave incorrectly.

I think there is no harm in these functions being always available with every thing resolved correctly at link time. However, if exclusion checks are cheap and easy, we prefer to use them wherever possible simply to cut down on time needed for building/testing those cases. Even seemingly trivial savings in this regard can be significant on target boards.

[dsanders]

lib/builtins/mips/mips16_gen.h

23–24

Sorry for going quiet all of a sudden. Things got rather busy.

That makes sense to me. Excluding these functions when building the library for microMIPS or MIPS32r6/MIPS64r6 seems sensible too. I'm not sure about the soft-float check though. Admittedly it would be unusual, but I don't think there's a technical reason that an MIPS16 app couldn't be compiled with -mhard-float and link against a -msoft-float library. I believe it should end up with the app calling the hardfloat wrappers which are implemented using softfloat.

[farazs]

Integrate suggestions from dsanders regarding comments and conditional compile blocks for mips16 wrappers. Introduce _MIPS16_COMPAT as a control-point for whether mips16 wrappers are needed in target library based on ABI and ISA revision.

lib/builtins/CMakeLists.txt

set(arm_SOURCES
   arm/truncdfsf2vfp.S
   arm/udivmodsi4.S
   arm/udivsi3.S
   arm/umodsi3.S
   arm/unorddf2vfp.S
   arm/unordsf2vfp.S
   ${GENERIC_SOURCES})
 
+set(mips16_SOURCES
+  mips/mips16_cmpdf2.c
+  mips/mips16_cmpsf2.c
+  mips/mips16_extendsfdf2.c
+  mips/mips16_fix_truncdfsi.c
+  mips/mips16_fix_truncsfsi.c
+  mips/mips16_floatdf.c
+  mips/mips16_floatsf.c
+  mips/mips16_opdf3.c
+  mips/mips16_opsf3.c
+  mips/mips16_truncdfsf2.c)
+
+set(mips_SOURCES ${mips16_SOURCES} ${GENERIC_SOURCES})
+
+set_source_files_properties(${mips16_SOURCES}
+  PROPERTIES 
+  COMPILE_FLAGS "-Os")
+
 add_custom_target(builtins)
 
 if (NOT WIN32)
-  foreach (arch x86_64 i386 arm)
+  foreach (arch x86_64 i386 arm mips)
     if (CAN_TARGET_${arch})
       # Filter out generic versions of routines that are re-implemented in
       # architecture specific manner.  This prevents multiple definitions of the
       # same symbols, making the symbol selection non-deterministic.
       foreach (_file ${${arch}_SOURCES})
         if (${_file} MATCHES ${arch}/*)
           get_filename_component(_name ${_file} NAME)
           string(REPLACE ".S" ".c" _cname "${_name}")

lib/builtins/mips/mips16_cmpdf2.c

+/* ===-- mips16_cmpdf2.c - mips16 wrappers for double comparison -----------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ *
+ * This file defines soft-fp wrappers to make hardware floating point
+ * available to MIPS16 code by temporarily switching the instruction
+ * set. These wrappers accept arguments and produce results in GP registers,
+ * but may perform the underlying operation using floating point instructions
+ * and registers.
+ * Wrappers for comparison of double precision values
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#if !defined(__mips_single_float) && !defined(__SINGLE_FLOAT)
+
+#define DOUBLE_PRECISION
+
+#include "mips16_gen.h"
+
+#if defined(_MIPS16_COMPAT)
+
+GENOP2(eqdf2, ==, 0, 1);
+
+GENOP2(nedf2, !=, 1, 0);
+
+GENOP2(gtdf2, >, 1, 0);
+
+GENOP2(gedf2, >=, 0, -1);
+
+GENOP2(ltdf2, <, -1, 0);
+
+GENOP2(ledf2, <=, 0, 1);
+
+GENUNORDOP2(unorddf2);
+
+#endif  /* _MIPS16_COMPAT */
+
+#endif  /* __mips_single_float */

lib/builtins/mips/mips16_cmpsf2.c

+/* ===-- mips16_cmpsf2.c - mips16 wrappers for float comparison ------------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ *
+ * This file defines soft-fp wrappers to make hardware floating point
+ * available to MIPS16 code by temporarily switching the instruction
+ * set. These wrappers accept arguments and produce results in GP registers,
+ * but may perform the underlying operation using floating point instructions
+ * and registers.
+ * Wrappers for comparison of single precision values
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#define SINGLE_PRECISION
+
+#include "mips16_gen.h"
+
+#if defined(_MIPS16_COMPAT)
+
+GENOP2(eqsf2, ==, 0, 1);
+
+GENOP2(nesf2, !=, 1, 0);
+
+GENOP2(gtsf2, >, 1, 0);
+
+GENOP2(gesf2, >=, 0, -1);
+
+GENOP2(ltsf2, <, -1, 0);
+
+GENOP2(lesf2, <=, 0, 1);
+
+GENUNORDOP2(unordsf2);
+
+#endif /* _MIPS16_COMPAT */

lib/builtins/mips/mips16_extendsfdf2.c

+/* ===-- mips16_extenddfsf2.c - mips16 wrappers for double precision -------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ *
+ * This file defines soft-fp wrappers to make hardware floating point
+ * available to MIPS16 code by temporarily switching the instruction
+ * set. These wrappers accept arguments and produce results in GP registers,
+ * but may perform the underlying operation using floating point instructions
+ * and registers.
+ * Function to convert representations from single to double precision
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#if !defined(__mips_single_float) && !defined(__SINGLE_FLOAT)
+
+#define DOUBLE_PRECISION
+
+#include "mips16_gen.h"
+
+#if defined(_MIPS16_COMPAT)
+
+GENCVTFOP1(extendsfdf2, su_int, float, .u);
+
+#endif  /* _MIPS16_COMPAT */
+
+#endif  /* __mips_single_float */

lib/builtins/mips/mips16_fix_truncdfsi.c

+/* ===-- mips16_fix_truncdfsi.c - wrapper __mips16_fix_truncdfsi -----------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ *
+ * This file defines soft-fp wrappers to make hardware floating point
+ * available to MIPS16 code by temporarily switching the instruction
+ * set. These wrappers accept arguments and produce results in GP registers,
+ * but may perform the underlying operation using floating point instructions
+ * and registers.
+ * Function to convert double precision to signed integer with truncation of
+ * fractional part
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#if !defined(__mips_single_float) && !defined(__SINGLE_FLOAT)
+
+#define DOUBLE_PRECISION
+
+#include "mips16_gen.h"
+
+#if defined(_MIPS16_COMPAT)
+
+GENFIXOP1(fix_truncdfsi, si_int);
+
+#endif  /* _MIPS16_COMPAT */
+
+#endif  /* __mips_single_float */

lib/builtins/mips/mips16_fix_truncsfsi.c

+/* ===-- mips16_fix_truncsfsi.c - wrappers for __mips16_fix_truncsfsi ------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ *
+ * This file defines soft-fp wrappers to make hardware floating point
+ * available to MIPS16 code by temporarily switching the instruction
+ * set. These wrappers accept arguments and produce results in GP registers,
+ * but may perform the underlying operation using floating point instructions
+ * and registers.
+ * Function to convert from single-precision float to signed integer
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#define SINGLE_PRECISION
+
+#include "mips16_gen.h"
+
+#if defined(_MIPS16_COMPAT)
+
+GENFIXOP1(fix_truncsfsi, si_int);
+
+#endif  /* _MIPS16_COMPAT */

lib/builtins/mips/mips16_floatdf.c

+/* ===-- mips16_floatdf.c - wrappers for __mips16_float[un]sidf   ----------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ *
+ * This file defines soft-fp wrappers to make hardware floating point
+ * available to MIPS16 code by temporarily switching the instruction
+ * set. These wrappers accept arguments and produce results in GP registers,
+ * but may perform the underlying operation using floating point instructions
+ * and registers.
+ * Functions to convert signed/unsigned integers to double precision
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#if !defined(__mips_single_float) && !defined(__SINGLE_FLOAT)
+
+#define DOUBLE_PRECISION
+
+#include "mips16_gen.h"
+
+#if defined(_MIPS16_COMPAT)
+
+GENCVTOP1(floatsidf, si_int);
+
+GENCVTOP1(floatunsidf, su_int);
+
+#endif  /* _MIPS16_COMPAT */
+
+#endif  /* __mips_single_float */

lib/builtins/mips/mips16_floatsf.c

+/* ===-- mips16_floatsf.c - wrappers for __mips16_float[un]sisf ------------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ *
+ * This file defines soft-fp wrappers to make hardware floating point
+ * available to MIPS16 code by temporarily switching the instruction
+ * set. These wrappers accept arguments and produce results in GP registers,
+ * but may perform the underlying operation using floating point instructions
+ * and registers.
+ * Functions to convert signed/unsigned integers to single-precision float
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#define SINGLE_PRECISION
+
+#include "mips16_gen.h"
+
+#if defined(_MIPS16_COMPAT)
+
+GENCVTOP1(floatsisf,si_int);
+
+GENCVTOP1(floatunsisf,su_int);
+
+#endif  /* _MIPS16_COMPAT */

lib/builtins/mips/mips16_gen.h

+/* ===-- mips16_gen.h - macros to generate mips16 wrappers  ----------------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ *
+ * This file is not part of the interface of this library.
+ *
+ * This file contains generator macros for soft-fp wrappers to make hardware 
+ * floating point available to MIPS16 code by temporarily switching the 
+ * instruction set. These wrappers accept arguments and produce results in 
+ * GP registers, but may perform the underlying operation using floating point
+ * instructions and registers.
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#if !defined(__mips_micromips) && __mips_isa_rev < 6
+#if defined _MIPS_SIM && (_MIPS_SIM == _ABIO32 || _MIPS_SIM == _ABIO64)
+
+#define _MIPS16_COMPAT
+
+#include "../fp_lib.h"
+#include "../int_types.h"
+
+#define GENOP3(name,op)                                                 \
+    rep_t __mips16_##name(rep_t, rep_t) __attribute__((nomips16));      \
+    rep_t __mips16_##name(rep_t op1, rep_t op2)                         \
+    {                                                                   \
+        return toRep(fromRep(op1) op fromRep(op2));                     \
+    }
+
+#define GENOP2(name,op,ret1,ret2)                                       \
+    int __mips16_##name(rep_t, rep_t) __attribute__((nomips16));        \
+    int __mips16_##name(rep_t op1, rep_t op2)                           \
+    {                                                                   \
+        if (fromRep(op1) op fromRep(op2))                               \
+            return ret1;                                                \
+        else                                                            \
+            return ret2;                                                \
+    }
+
+#define GENUNORDOP2(name)                                               \
+    int __mips16_##name(rep_t, rep_t) __attribute__((nomips16));       \
+    int __mips16_##name(rep_t op1, rep_t op2)                           \
+    {                                                                   \
+        fp_t op1fp = fromRep(op1), op2fp = fromRep(op2);                \
+        if (!(op1fp >= op2fp) && !(op1fp < op2fp))                      \
+            return 1;                                                   \
+        else                                                            \
+            return 0;                                                   \
+    }
+
+#define GENCVTOP1(name,type)                                    \
+    rep_t __mips16_##name(type) __attribute__((nomips16));      \
+    rep_t __mips16_##name(type op1)                             \
+    {                                                           \
+        return (toRep((fp_t)op1));                              \
+    }
+
+#define GENCVTFOP1(name,type1,type2,acc)                        \
+    rep_t __mips16_##name(type1) __attribute__((nomips16));     \
+    rep_t __mips16_##name(type1 op1)                            \
+    {                                                           \
+        const type2##_bits __tmp = {acc = op1};                 \
+        return (toRep((fp_t)__tmp.f));                          \
+    }
+
+#define GENFIXOP1(name,type)                                    \
+    type __mips16_##name(rep_t) __attribute__((nomips16));      \
+    type __mips16_##name(rep_t op1)                             \
+    {                                                           \
+        return ((type)fromRep(op1));                            \
+    }
+
+#endif /* _MIPS_SIM */
+#endif /* micromips */

lib/builtins/mips/mips16_opdf3.c

+/* ===-- mips16_opdf3.c - mips16 wrappers for double precision arithmetic --===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ *
+ * This file defines soft-fp wrappers to make hardware floating point
+ * available to MIPS16 code by temporarily switching the instruction
+ * set. These wrappers accept arguments and produce results in GP registers,
+ * but may perform the underlying operation using floating point instructions
+ * and registers.
+ * Functions for double precision arithmetic operations
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#if !defined(__mips_single_float) && !defined(__SINGLE_FLOAT)
+
+#define DOUBLE_PRECISION
+
+#include "mips16_gen.h"
+
+#if defined(_MIPS16_COMPAT)
+
+GENOP3(adddf3, +);
+
+GENOP3(subdf3, -);
+
+GENOP3(muldf3, *);
+
+GENOP3(divdf3, /);
+
+#endif  /* _MIPS16_COMPAT */
+
+#endif  /* __mips_single_float */

lib/builtins/mips/mips16_opsf3.c

+/* ===-- mips16_opsf3.c - mips16 wrappers for single precision arithmetic --===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ *
+ * This file defines soft-fp wrappers to make hardware floating point
+ * available to MIPS16 code by temporarily switching the instruction
+ * set. These wrappers accept arguments and produce results in GP registers,
+ * but may perform the underlying operation using floating point instructions
+ * and registers.
+ * Single-precision arithmetic operations: add, sub, mul, div
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#define SINGLE_PRECISION
+
+#include "mips16_gen.h"
+
+#if defined(_MIPS16_COMPAT)
+
+GENOP3(addsf3, +);
+
+GENOP3(subsf3, -);
+
+GENOP3(mulsf3, *);
+
+GENOP3(divsf3, /);
+
+#endif  /* _MIPS16_COMPAT */

lib/builtins/mips/mips16_truncdfsf2.c

+/* ===-- mips16_truncdfsf2.c - mips16 wrappers for double precision  -------===
+ *
+ *                     The LLVM Compiler Infrastructure
+ *
+ * This file is dual licensed under the MIT and the University of Illinois Open
+ * Source Licenses. See LICENSE.TXT for details.
+ *
+ * ===----------------------------------------------------------------------===
+ *
+ * This file defines soft-fp wrappers to make hardware floating point
+ * available to MIPS16 code by temporarily switching the instruction
+ * set. These wrappers accept arguments and produce results in GP registers,
+ * but may perform the underlying operation using floating point instructions
+ * and registers.
+ * Function to convert representations double to single precision
+ *
+ * ===----------------------------------------------------------------------===
+ */
+
+#define SINGLE_PRECISION
+
+#include "mips16_gen.h"
+
+#if defined(_MIPS16_COMPAT)
+
+GENCVTFOP1(truncdfsf2, du_int, double, .u.all);
+
+#endif  /* _MIPS16_COMPAT */