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ARM: handle Windows specific relocations in CPI
Needs ReviewPublic

Authored by abdulras on Apr 2 2014, 10:34 AM.

Details

Reviewers
t.p.northover
Summary

This adds special handling for the Windows relocations when laying out the
Constant Pool Islands. When a mov.w/mov.t instruction pair occurs to load an
address, the Windows loader expects the instructions to be contiguous. Ensure
that a constant island is not placed in between the two instructions. The
resulting code would appear as follows:

mov.w {address}

{constant data island}

mov.t {address}

Unfortunately, there is no good way to provide tests for constant island passes.
Generating a test case would also be pretty fragile as the constant island can
move between positions.

Diff Detail

Event Timeline

Hi Saleem,

I've not yet looked at the placement within ConstantIslands, but one
thing leapt out at me about the code itself:

+ if (MI->getOpcode() == ARM::t2MOVTi16 && MI->getOperand(0).isTied())
+ while (MI->getOperand(0).isTied())

I don't think I understand the references to isTied here. I thought it
operated entirely within a single instruction, indicating that a
particular register had to be allocated to the same register as the
destination.

Cheers.

Tim.

Yes, the tied indicates that the register destination tied. This tie can extend beyond the single MI. I am using that tie to traverse the predecessors to ensure that the entire stream of tied instructions (in reality, since this is on Windows on ARM, this will be two instructions which comprise the 32-bit relocatable address) are kept on the same side of the island. The example that I provided in the hazard detection should serve well to provide a concrete example of how this works.