Hi
This patch fix a bug about incorrectly generating undef instruction for combining shuffle vector.
For the following test case:
define <1 x i32> @test16a(i32 %ele) {
%tmp0 = insertelement <2 x i32> <i32 1, i32 undef>, i32 %ele, i32 1 %tmp1 = shl <2 x i32> %tmp0, <i32 1, i32 1> %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <1 x i32> <i32 0> ret <1 x i32> %tmp2
}
Currently it will optimize shufflevector to shl <1 x i32 >undef, <i32 1>, and the final result will be ret <1 x i32> zero.
This is obviously wrong as it should return <1 x i32> 2.
This is caused by incorrectly return an undef value when it finds the inserted element in an insert element instruction is not in the mask of shuffle vector. But it should keep on finding all the values in mask in the operand 0 of insert element instruction.
Thanks,
-Hao