[SystemZ] Add support for missing instructions

[• zhanjunl]

Summary

Add support to allow clang integrated assembler to recognize some missing instructions, for openssl.

Instructions are:
LM, LMH, LMY, STM, STMH, STMY, ICM, ICMH, ICMY, SLA, SLAK, TML, TMH, EX, EXRL.

[uweigand]

See inline comments.

Also, when adding new instructions, you need to add disassembler tests as well (test/MC/Disassembler/SystemZ).

It would be nice to add not just single instructions you find missing somewhere, but full related groups of instructions where it makes sense. For example, when adding EX, it might be nice to also add EXRL. Similarly, when adding ICM(Y), it would be nice to also add ICMH, and possibly even STCM(Y/H) and CLCM(Y/H) as well. (To be clear: this is just a suggestion, not a requirement.)

lib/Target/SystemZ/SystemZInstrInfo.td

706 ↗

(On Diff #62885)

This should use a *Pair pattern like all other "y" instructions.

711 ↗

(On Diff #62885)

Likewise.

825 ↗

(On Diff #62885)

Please create a new TernaryRSPair for those (implemented similarly to TernaryRXF).

1381 ↗

(On Diff #62885)

These are just aliases for TMLL/TMLH, so it should be enough to define those via InstAlias.

1672 ↗

(On Diff #62885)

Don't need the { } for a single statement here.

[• koriakin]

lib/Target/SystemZ/SystemZInstrInfo.td

1201 ↗

(On Diff #62885)

Don't give a pattern to this instruction - otherwise, ISel could use it to implement shl, which is incorrect.

[• zhanjunl]

Updated the diff with fixes based on comments, to add *Pair classes, to use InstAlias, and to remove the pattern from SLA. Also added EXRL, ICMH, STMH, LMH, and added disassembler tests.

[uweigand]

See the inline comment. Otherwise, LGTM. Thanks!

lib/Target/SystemZ/SystemZInstrInfo.td

823 ↗

(On Diff #63226)

ICMH also should be in the Defs = [CC] clause.

[• zhanjunl]

Whoops you're right, I've added ICMH to the Defs = [CC] clause.

[uweigand]

LGTM, thanks!

llvm/trunk/lib/Target/SystemZ/SystemZInstrFormats.td

class BranchUnaryRI<string mnemonic, bits<12> opcode, RegisterOperand cls>
   : InstRI<opcode, (outs cls:$R1), (ins cls:$R1src, brtarget16:$I2),
            mnemonic##"\t$R1, $I2", []> {
   let isBranch = 1;
   let isTerminator = 1;
   let Constraints = "$R1 = $R1src";
   let DisableEncoding = "$R1src";
 }
 
-class LoadMultipleRSY<string mnemonic, bits<16> opcode, RegisterOperand cls>
-  : InstRSY<opcode, (outs cls:$R1, cls:$R3), (ins bdaddr20only:$BD2),
+class LoadMultipleRS<string mnemonic, bits<8> opcode, RegisterOperand cls,
+                     AddressingMode mode = bdaddr12only>
+  : InstRS<opcode, (outs cls:$R1, cls:$R3), (ins mode:$BD2),
+           mnemonic#"\t$R1, $R3, $BD2", []> {
+  let mayLoad = 1;
+}
+
+class LoadMultipleRSY<string mnemonic, bits<16> opcode, RegisterOperand cls,
+                      AddressingMode mode = bdaddr20only>
+  : InstRSY<opcode, (outs cls:$R1, cls:$R3), (ins mode:$BD2),
             mnemonic#"\t$R1, $R3, $BD2", []> {
   let mayLoad = 1;
 }
 
+multiclass LoadMultipleRSPair<string mnemonic, bits<8> rsOpcode,
+                              bits<16> rsyOpcode, RegisterOperand cls> {
+  let DispKey = mnemonic ## #cls in {
+    let DispSize = "12" in
+      def "" : LoadMultipleRS<mnemonic, rsOpcode, cls, bdaddr12pair>;
+    let DispSize = "20" in
+      def Y  : LoadMultipleRSY<mnemonic#"y", rsyOpcode, cls, bdaddr20pair>;
+  }
+}
+
 class LoadMultipleVRSa<string mnemonic, bits<16> opcode>
   : InstVRSa<opcode, (outs VR128:$V1, VR128:$V3), (ins bdaddr12only:$BD2),
              mnemonic#"\t$V1, $V3, $BD2", []> {
   let M4 = 0;
   let mayLoad = 1;
 }
 
 class StoreRILPC<string mnemonic, bits<12> opcode, SDPatternOperator operator,
class StoreLengthVRSb<string mnemonic, bits<16> opcode,
   : InstVRSb<opcode, (outs), (ins VR128:$V1, GR32:$R3, bdaddr12only:$BD2),
              mnemonic#"\t$V1, $R3, $BD2",
              [(operator VR128:$V1, GR32:$R3, bdaddr12only:$BD2)]> {
   let M4 = 0;
   let mayStore = 1;
   let AccessBytes = bytes;
 }
 
-class StoreMultipleRSY<string mnemonic, bits<16> opcode, RegisterOperand cls>
-  : InstRSY<opcode, (outs), (ins cls:$R1, cls:$R3, bdaddr20only:$BD2),
+class StoreMultipleRS<string mnemonic, bits<8> opcode, RegisterOperand cls,
+                      AddressingMode mode = bdaddr12only>
+  : InstRS<opcode, (outs), (ins cls:$R1, cls:$R3, mode:$BD2),
+           mnemonic#"\t$R1, $R3, $BD2", []> {
+  let mayStore = 1;
+}
+
+class StoreMultipleRSY<string mnemonic, bits<16> opcode, RegisterOperand cls,
+                       AddressingMode mode = bdaddr20only>
+  : InstRSY<opcode, (outs), (ins cls:$R1, cls:$R3, mode:$BD2),
             mnemonic#"\t$R1, $R3, $BD2", []> {
   let mayStore = 1;
 }
 
+multiclass StoreMultipleRSPair<string mnemonic, bits<8> rsOpcode,
+                               bits<16> rsyOpcode, RegisterOperand cls> {
+  let DispKey = mnemonic ## #cls in {
+    let DispSize = "12" in
+      def "" : StoreMultipleRS<mnemonic, rsOpcode, cls, bdaddr12pair>;
+    let DispSize = "20" in
+      def Y  : StoreMultipleRSY<mnemonic#"y", rsyOpcode, cls, bdaddr20pair>;
+  }
+}
+
 class StoreMultipleVRSa<string mnemonic, bits<16> opcode>
   : InstVRSa<opcode, (outs), (ins VR128:$V1, VR128:$V3, bdaddr12only:$BD2),
              mnemonic#"\t$V1, $V3, $BD2", []> {
   let M4 = 0;
   let mayStore = 1;
 }
 
 // StoreSI* instructions are used to store an integer to memory, but the
: InstRRD<opcode, (outs cls:$R1), (ins cls:$R1src, cls:$R3, cls:$R2),
             mnemonic#"r\t$R1, $R3, $R2",
             [(set cls:$R1, (operator cls:$R1src, cls:$R3, cls:$R2))]> {
   let OpKey = mnemonic ## cls;
   let OpType = "reg";
   let Constraints = "$R1 = $R1src";
   let DisableEncoding = "$R1src";
 }
 
+class TernaryRS<string mnemonic, bits<8> opcode, RegisterOperand cls,
+                bits<5> bytes, AddressingMode mode = bdaddr12only>
+  : InstRS<opcode, (outs cls:$R1),
+          (ins cls:$R1src, imm32zx4:$R3, mode:$BD2),
+           mnemonic#"\t$R1, $R3, $BD2", []> {
+
+  let Constraints = "$R1 = $R1src";
+  let DisableEncoding = "$R1src";
+  let mayLoad = 1;
+  let AccessBytes = bytes;
+}
+
+class TernaryRSY<string mnemonic, bits<16> opcode, RegisterOperand cls,
+                bits<5> bytes, AddressingMode mode = bdaddr20only>
+  : InstRSY<opcode, (outs cls:$R1),
+           (ins cls:$R1src, imm32zx4:$R3, mode:$BD2),
+            mnemonic#"\t$R1, $R3, $BD2", []> {
+
+  let Constraints = "$R1 = $R1src";
+  let DisableEncoding = "$R1src";
+  let mayLoad = 1;
+  let AccessBytes = bytes;
+}
+
+multiclass TernaryRSPair<string mnemonic, bits<8> rsOpcode, bits<16> rsyOpcode,
+                         RegisterOperand cls, bits<5> bytes> {
+  let DispKey = mnemonic ## #cls in {
+    let DispSize = "12" in
+      def "" : TernaryRS<mnemonic, rsOpcode, cls, bytes, bdaddr12pair>;
+    let DispSize = "20" in
+      def Y  : TernaryRSY<mnemonic#"y", rsyOpcode, cls, bytes, bdaddr20pair>;
+  }
+}
+
 class TernaryRXF<string mnemonic, bits<16> opcode, SDPatternOperator operator,
                  RegisterOperand cls, SDPatternOperator load, bits<5> bytes>
   : InstRXF<opcode, (outs cls:$R1),
             (ins cls:$R1src, cls:$R3, bdxaddr12only:$XBD2),
             mnemonic#"\t$R1, $R3, $XBD2",
             [(set cls:$R1, (operator cls:$R1src, cls:$R3,
                                      (load bdxaddr12only:$XBD2)))]> {
   let OpKey = mnemonic ## cls;

llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td

 defm : StoreGR64Pair<ST, STY, truncstorei32>;
 def  : StoreGR64PC<STRL, aligned_truncstorei32>;
 
 //===----------------------------------------------------------------------===//
 // Multi-register moves
 //===----------------------------------------------------------------------===//
 
 // Multi-register loads.
+defm LM : LoadMultipleRSPair<"lm", 0x98, 0xEB98, GR32>;
 def LMG : LoadMultipleRSY<"lmg", 0xEB04, GR64>;
+def LMH : LoadMultipleRSY<"lmh", 0xEB96, GRH32>;
 
 // Multi-register stores.
+defm STM : StoreMultipleRSPair<"stm", 0x90, 0xEB90, GR32>;
 def STMG : StoreMultipleRSY<"stmg", 0xEB24, GR64>;
+def STMH : StoreMultipleRSY<"stmh", 0xEB26, GRH32>;
 
 //===----------------------------------------------------------------------===//
 // Byte swaps
 //===----------------------------------------------------------------------===//
 
 // Byte-swapping register moves.
 let hasSideEffects = 0 in {
   def LRVR  : UnaryRRE<"lrv",  0xB91F, bswap, GR32, GR32>;

 defm IC : BinaryRXPair<"ic", 0x43, 0xE373, inserti8, GR64, azextloadi8, 1>;
 
 defm : InsertMem<"inserti8", IC32,  GR32, azextloadi8, bdxaddr12pair>;
 defm : InsertMem<"inserti8", IC32Y, GR32, azextloadi8, bdxaddr20pair>;
 
 defm : InsertMem<"inserti8", IC,  GR64, azextloadi8, bdxaddr12pair>;
 defm : InsertMem<"inserti8", ICY, GR64, azextloadi8, bdxaddr20pair>;
 
+let Defs = [CC] in {
+  defm ICM : TernaryRSPair<"icm", 0xBF, 0xEB81, GR32, 0>;
+  def ICMH : TernaryRSY<"icmh", 0xEB80, GRH32, 0>;
+}
+
 // Insertions of a 16-bit immediate, leaving other bits unaffected.
 // We don't have or_as_insert equivalents of these operations because
 // OI is available instead.
 //
 // IIxMux expands to II[LH]x, depending on the choice of register.
 def IILMux : BinaryRIPseudo<insertll, GRX32, imm32ll16>,
              Requires<[FeatureHighWord]>;
 def IIHMux : BinaryRIPseudo<insertlh, GRX32, imm32lh16>,

 
 //===----------------------------------------------------------------------===//
 // Shifts
 //===----------------------------------------------------------------------===//
 
 // Shift left.
 let hasSideEffects = 0 in {
   defm SLL : BinaryRSAndK<"sll", 0x89, 0xEBDF, shl, GR32>;
+  defm SLA : BinaryRSAndK<"sla", 0x8B, 0xEBDD, null_frag, GR32>;
   def SLLG : BinaryRSY<"sllg", 0xEB0D, shl, GR64>;
 }
 
 // Logical shift right.
 let hasSideEffects = 0 in {
   defm SRL : BinaryRSAndK<"srl", 0x88, 0xEBDE, srl, GR32>;
   def SRLG : BinaryRSY<"srlg", 0xEB0C, srl, GR64>;
 }
let Defs = [CC] in {
   def TMLL64 : CompareAliasRI<z_tm_reg, GR64, imm64ll16>;
   def TMLH64 : CompareAliasRI<z_tm_reg, GR64, imm64lh16>;
   def TMHL64 : CompareAliasRI<z_tm_reg, GR64, imm64hl16>;
   def TMHH64 : CompareAliasRI<z_tm_reg, GR64, imm64hh16>;
 
   defm TM : CompareSIPair<"tm", 0x91, 0xEB51, z_tm_mem, anyextloadi8, imm32zx8>;
 }
 
+def TML : InstAlias<"tml\t$R, $I", (TMLL GR32:$R, imm32ll16:$I), 0>;
+def TMH : InstAlias<"tmh\t$R, $I", (TMLH GR32:$R, imm32lh16:$I), 0>;
+
 //===----------------------------------------------------------------------===//
 // Prefetch
 //===----------------------------------------------------------------------===//
 
 def PFD : PrefetchRXY<"pfd", 0xE336, z_prefetch>;
 def PFDRL : PrefetchRILPC<"pfdrl", 0xC62, z_prefetch>;
 
 //===----------------------------------------------------------------------===//
let hasSideEffects = 1, Defs = [CC], mayStore = 1 in
   def STCKE : InstS<0xB278, (outs), (ins bdaddr12only:$BD2),
                        "stcke\t$BD2",
                        []>;
 let hasSideEffects = 1, Defs = [CC], mayStore = 1 in
   def STFLE : InstS<0xB2B0, (outs), (ins bdaddr12only:$BD2),
                        "stfle\t$BD2",
                        []>;
 
+let hasSideEffects = 1 in {
+  def EX   : InstRX<0x44, (outs), (ins GR64:$R1, bdxaddr12only:$XBD2),
+                  "ex\t$R1, $XBD2", []>;
+  def EXRL : InstRIL<0xC60, (outs), (ins GR64:$R1, pcrel32:$I2),
+                     "exrl\t$R1, $I2", []>;
+}
 
 
 //===----------------------------------------------------------------------===//
 // Peepholes.
 //===----------------------------------------------------------------------===//
 
 // Use AL* for GR64 additions of unsigned 32-bit values.
 defm : ZXB<add, GR64, ALGFR>;

llvm/trunk/test/MC/Disassembler/SystemZ/insns-pcrel.txt

 
 # 0x000009cc:
 # CHECK: clij %r0, 0, 14, 0x9cc
 0xec 0x0e 0x00 0x00 0x00 0x7f
 
 # 0x000009d2:
 # CHECK: clij %r0, 0, 15, 0x9d2
 0xec 0x0f 0x00 0x00 0x00 0x7f
+
+# 0x000009d8:
+# CHECK: exrl %r0, 0x9d8
+0xc6 0x00 0x00 0x00 0x00 0x00
+
+# 0x000009de:
+# CHECK: exrl %r15, 0x9de
+0xc6 0xf0 0x00 0x00 0x00 0x00
+
+# 0x000009e4:
+# CHECK: exrl %r0, 0x9e2
+0xc6 0x00 0xff 0xff 0xff 0xff
+
+# 0x000009ea:
+# CHECK: exrl %r15, 0x9e8
+0xc6 0xf0 0xff 0xff 0xff 0xff
+
+# 0x000009f0:
+# CHECK: exrl %r0, 0xffffffff000009f0
+0xc6 0x00 0x80 0x00 0x00 0x00
+
+# 0x000009f6:
+# CHECK: exrl %r15, 0xffffffff000009f6
+0xc6 0xf0 0x80 0x00 0x00 0x00
+
+# 0x000009fc:
+# CHECK: exrl %r0, 0x1000009fa
+0xc6 0x00 0x7f 0xff 0xff 0xff
+
+# 0x00000a02:
+# CHECK: exrl %r15, 0x100000a00
+0xc6 0xf0 0x7f 0xff 0xff 0xff

llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt

 0xb2 0xec 0x00 0x00
 
 # CHECK: etnd %r15
 0xb2 0xec 0x00 0xf0
 
 # CHECK: etnd %r7
 0xb2 0xec 0x00 0x70
 
+# CHECK: ex %r0, 0
+0x44 0x00 0x00 0x00
+
+# CHECK: ex %r0, 4095
+0x44 0x00 0x0f 0xff
+
+# CHECK: ex %r0, 0(%r1)
+0x44 0x00 0x10 0x00
+
+# CHECK: ex %r0, 0(%r15)
+0x44 0x00 0xf0 0x00
+
+# CHECK: ex %r0, 4095(%r1,%r15)
+0x44 0x01 0xff 0xff
+
+# CHECK: ex %r0, 4095(%r15,%r1)
+0x44 0x0f 0x1f 0xff
+
+# CHECK: ex %r15, 0
+0x44 0xf0 0x00 0x00
+
 # CHECK: fidbr %f0, 0, %f0
 0xb3 0x5f 0x00 0x00
 
 # CHECK: fidbr %f0, 0, %f15
 0xb3 0x5f 0x00 0x0f
 
 # CHECK: fidbr %f0, 15, %f0
 0xb3 0x5f 0xf0 0x00

 0x43 0x01 0xff 0xff
 
 # CHECK: ic %r0, 4095(%r15,%r1)
 0x43 0x0f 0x1f 0xff
 
 # CHECK: ic %r15, 0
 0x43 0xf0 0x00 0x00
 
+# CHECK: icm %r0, 0, 0
+0xbf 0x00 0x00 0x00
+
+# CHECK: icm %r0, 15, 4095
+0xbf 0x0f 0x0f 0xff
+
+# CHECK: icm %r0, 0, 0(%r1)
+0xbf 0x00 0x10 0x00
+
+# CHECK: icm %r0, 0, 0(%r15)
+0xbf 0x00 0xf0 0x00
+
+# CHECK: icm %r0, 15, 4095(%r15)
+0xbf 0x0f 0xff 0xff
+
+# CHECK: icm %r0, 0, 4095(%r1)
+0xbf 0x00 0x1f 0xff
+
+# CHECK: icm %r15, 0, 0
+0xbf 0xf0 0x00 0x00
+
+# CHECK: icmh %r0, 0, -524288
+0xeb 0x00 0x00 0x00 0x80 0x80
+
+# CHECK: icmh %r0, 0, -1
+0xeb 0x00 0x0f 0xff 0xff 0x80
+
+# CHECK: icmh %r0, 15, 0
+0xeb 0x0f 0x00 0x00 0x00 0x80
+
+# CHECK: icmh %r0, 15, 1
+0xeb 0x0f 0x00 0x01 0x00 0x80
+
+# CHECK: icmh %r0, 8, 524287
+0xeb 0x08 0x0f 0xff 0x7f 0x80
+
+# CHECK: icmh %r0, 8, 0(%r1)
+0xeb 0x08 0x10 0x00 0x00 0x80
+
+# CHECK: icmh %r0, 4, 0(%r15)
+0xeb 0x04 0xf0 0x00 0x00 0x80
+
+# CHECK: icmh %r0, 4, 524287(%r15)
+0xeb 0x04 0xff 0xff 0x7f 0x80
+
+# CHECK: icmh %r0, 0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0x80
+
+# CHECK: icmh %r15, 0, 0
+0xeb 0xf0 0x00 0x00 0x00 0x80
+
+# CHECK: icmy %r0, 0, -524288
+0xeb 0x00 0x00 0x00 0x80 0x81
+
+# CHECK: icmy %r0, 0, -1
+0xeb 0x00 0x0f 0xff 0xff 0x81
+
+# CHECK: icmy %r0, 15, 0
+0xeb 0x0f 0x00 0x00 0x00 0x81
+
+# CHECK: icmy %r0, 15, 1
+0xeb 0x0f 0x00 0x01 0x00 0x81
+
+# CHECK: icmy %r0, 8, 524287
+0xeb 0x08 0x0f 0xff 0x7f 0x81
+
+# CHECK: icmy %r0, 8, 0(%r1)
+0xeb 0x08 0x10 0x00 0x00 0x81
+
+# CHECK: icmy %r0, 4, 0(%r15)
+0xeb 0x04 0xf0 0x00 0x00 0x81
+
+# CHECK: icmy %r0, 4, 524287(%r15)
+0xeb 0x04 0xff 0xff 0x7f 0x81
+
+# CHECK: icmy %r0, 0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0x81
+
+# CHECK: icmy %r15, 0, 0
+0xeb 0xf0 0x00 0x00 0x00 0x81
+
 # CHECK: icy %r0, -524288
 0xe3 0x00 0x00 0x00 0x80 0x73
 
 # CHECK: icy %r0, -1
 0xe3 0x00 0x0f 0xff 0xff 0x73
 
 # CHECK: icy %r0, 0
 0xe3 0x00 0x00 0x00 0x00 0x73

 0xa5 0x0f 0x80 0x00
 
 # CHECK: llill %r0, 65535
 0xa5 0x0f 0xff 0xff
 
 # CHECK: llill %r15, 0
 0xa5 0xff 0x00 0x00
 
+# CHECK: lm %r0, %r0, 0
+0x98 0x00 0x00 0x00
+
+# CHECK: lm %r0, %r15, 0
+0x98 0x0f 0x00 0x00
+
+# CHECK: lm %r14, %r15, 0
+0x98 0xef 0x00 0x00
+
+# CHECK: lm %r15, %r15, 0
+0x98 0xff 0x00 0x00
+
+# CHECK: lm %r0, %r0, 4095
+0x98 0x00 0x0f 0xff
+
+# CHECK: lm %r0, %r0, 1
+0x98 0x00 0x00 0x01
+
+# CHECK: lm %r0, %r0, 0(%r1)
+0x98 0x00 0x10 0x00
+
+# CHECK: lm %r0, %r0, 0(%r15)
+0x98 0x00 0xf0 0x00
+
+# CHECK: lm %r0, %r0, 4095(%r1)
+0x98 0x00 0x1f 0xff
+
+# CHECK: lm %r0, %r0, 4095(%r15)
+0x98 0x00 0xff 0xff
+
 # CHECK: lmg %r0, %r0, 0
 0xeb 0x00 0x00 0x00 0x00 0x04
 
 # CHECK: lmg %r0, %r15, 0
 0xeb 0x0f 0x00 0x00 0x00 0x04
 
 # CHECK: lmg %r14, %r15, 0
 0xeb 0xef 0x00 0x00 0x00 0x04

 0xeb 0x00 0xf0 0x00 0x00 0x04
 
 # CHECK: lmg %r0, %r0, 524287(%r1)
 0xeb 0x00 0x1f 0xff 0x7f 0x04
 
 # CHECK: lmg %r0, %r0, 524287(%r15)
 0xeb 0x00 0xff 0xff 0x7f 0x04
 
+# CHECK: lmh %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0x96
+
+# CHECK: lmh %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0x96
+
+# CHECK: lmh %r14, %r15, 0
+0xeb 0xef 0x00 0x00 0x00 0x96
+
+# CHECK: lmh %r15, %r15, 0
+0xeb 0xff 0x00 0x00 0x00 0x96
+
+# CHECK: lmh %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0x96
+
+# CHECK: lmh %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0x96
+
+# CHECK: lmh %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0x96
+
+# CHECK: lmh %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0x96
+
+# CHECK: lmh %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0x96
+
+# CHECK: lmh %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0x96
+
+# CHECK: lmh %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0x96
+
+# CHECK: lmh %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0x96
+
+# CHECK: lmh %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0x96
+
+# CHECK: lmy %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0x98
+
+# CHECK: lmy %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0x98
+
+# CHECK: lmy %r14, %r15, 0
+0xeb 0xef 0x00 0x00 0x00 0x98
+
+# CHECK: lmy %r15, %r15, 0
+0xeb 0xff 0x00 0x00 0x00 0x98
+
+# CHECK: lmy %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0x98
+
+# CHECK: lmy %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0x98
+
+# CHECK: lmy %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0x98
+
+# CHECK: lmy %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0x98
+
+# CHECK: lmy %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0x98
+
+# CHECK: lmy %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0x98
+
+# CHECK: lmy %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0x98
+
+# CHECK: lmy %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0x98
+
+# CHECK: lmy %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0x98
+
 # CHECK: lndbr %f0, %f9
 0xb3 0x11 0x00 0x09
 
 # CHECK: lndbr %f0, %f15
 0xb3 0x11 0x00 0x0f
 
 # CHECK: lndbr %f15, %f0
 0xb3 0x11 0x00 0xf0

 0xe3 0x01 0xff 0xff 0x7f 0x7b
 
 # CHECK: shy %r0, 524287(%r15,%r1)
 0xe3 0x0f 0x1f 0xff 0x7f 0x7b
 
 # CHECK: shy %r15, 0
 0xe3 0xf0 0x00 0x00 0x00 0x7b
 
+# CHECK: sla %r0, 0
+0x8b 0x00 0x00 0x00
+
+# CHECK: sla %r7, 0
+0x8b 0x70 0x00 0x00
+
+# CHECK: sla %r15, 0
+0x8b 0xf0 0x00 0x00
+
+# CHECK: sla %r0, 4095
+0x8b 0x00 0x0f 0xff
+
+# CHECK: sla %r0, 0(%r1)
+0x8b 0x00 0x10 0x00
+
+# CHECK: sla %r0, 0(%r15)
+0x8b 0x00 0xf0 0x00
+
+# CHECK: sla %r0, 4095(%r1)
+0x8b 0x00 0x1f 0xff
+
+# CHECK: sla %r0, 4095(%r15)
+0x8b 0x00 0xff 0xff
+
+# CHECK: slak %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xdd
+
+# CHECK: slak %r15, %r1, 0
+0xeb 0xf1 0x00 0x00 0x00 0xdd
+
+# CHECK: slak %r1, %r15, 0
+0xeb 0x1f 0x00 0x00 0x00 0xdd
+
+# CHECK: slak %r15, %r15, 0
+0xeb 0xff 0x00 0x00 0x00 0xdd
+
+# CHECK: slak %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xdd
+
+# CHECK: slak %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xdd
+
+# CHECK: slak %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xdd
+
+# CHECK: slak %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xdd
+
+# CHECK: slak %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xdd
+
+# CHECK: slak %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xdd
+
+# CHECK: slak %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xdd
+
+# CHECK: slak %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xdd
+
 # CHECK: slbgr %r0, %r0
 0xb9 0x89 0x00 0x00
 
 # CHECK: slbgr %r0, %r15
 0xb9 0x89 0x00 0x0f
 
 # CHECK: slbgr %r15, %r0
 0xb9 0x89 0x00 0xf0

 0xe3 0x01 0xff 0xff 0x7f 0x70
 
 # CHECK: sthy %r0, 524287(%r15,%r1)
 0xe3 0x0f 0x1f 0xff 0x7f 0x70
 
 # CHECK: sthy %r15, 0
 0xe3 0xf0 0x00 0x00 0x00 0x70
 
+# CHECK: stm %r0, %r0, 0
+0x90 0x00 0x00 0x00
+
+# CHECK: stm %r0, %r15, 0
+0x90 0x0f 0x00 0x00
+
+# CHECK: stm %r14, %r15, 0
+0x90 0xef 0x00 0x00
+
+# CHECK: stm %r15, %r15, 0
+0x90 0xff 0x00 0x00
+
+# CHECK: stm %r0, %r0, 4095
+0x90 0x00 0x0f 0xff
+
+# CHECK: stm %r0, %r0, 1
+0x90 0x00 0x00 0x01
+
+# CHECK: stm %r0, %r0, 0(%r1)
+0x90 0x00 0x10 0x00
+
+# CHECK: stm %r0, %r0, 0(%r15)
+0x90 0x00 0xf0 0x00
+
+# CHECK: stm %r0, %r0, 4095(%r1)
+0x90 0x00 0x1f 0xff
+
+# CHECK: stm %r0, %r0, 4095(%r15)
+0x90 0x00 0xff 0xff
+
 # CHECK: stmg %r0, %r0, 0
 0xeb 0x00 0x00 0x00 0x00 0x24
 
 # CHECK: stmg %r0, %r15, 0
 0xeb 0x0f 0x00 0x00 0x00 0x24
 
 # CHECK: stmg %r14, %r15, 0
 0xeb 0xef 0x00 0x00 0x00 0x24

 0xeb 0x00 0xf0 0x00 0x00 0x24
 
 # CHECK: stmg %r0, %r0, 524287(%r1)
 0xeb 0x00 0x1f 0xff 0x7f 0x24
 
 # CHECK: stmg %r0, %r0, 524287(%r15)
 0xeb 0x00 0xff 0xff 0x7f 0x24
 
+# CHECK: stmh %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0x26
+
+# CHECK: stmh %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0x26
+
+# CHECK: stmh %r14, %r15, 0
+0xeb 0xef 0x00 0x00 0x00 0x26
+
+# CHECK: stmh %r15, %r15, 0
+0xeb 0xff 0x00 0x00 0x00 0x26
+
+# CHECK: stmh %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0x26
+
+# CHECK: stmh %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0x26
+
+# CHECK: stmh %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0x26
+
+# CHECK: stmh %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0x26
+
+# CHECK: stmh %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0x26
+
+# CHECK: stmh %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0x26
+
+# CHECK: stmh %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0x26
+
+# CHECK: stmh %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0x26
+
+# CHECK: stmh %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0x26
+
+# CHECK: stmy %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0x90
+
+# CHECK: stmy %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0x90
+
+# CHECK: stmy %r14, %r15, 0
+0xeb 0xef 0x00 0x00 0x00 0x90
+
+# CHECK: stmy %r15, %r15, 0
+0xeb 0xff 0x00 0x00 0x00 0x90
+
+# CHECK: stmy %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0x90
+
+# CHECK: stmy %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0x90
+
+# CHECK: stmy %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0x90
+
+# CHECK: stmy %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0x90
+
+# CHECK: stmy %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0x90
+
+# CHECK: stmy %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0x90
+
+# CHECK: stmy %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0x90
+
+# CHECK: stmy %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0x90
+
+# CHECK: stmy %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0x90
+
 # CHECK: strvg %r0, -524288
 0xe3 0x00 0x00 0x00 0x80 0x2f
 
 # CHECK: strvg %r0, -1
 0xe3 0x00 0x0f 0xff 0xff 0x2f
 
 # CHECK: strvg %r0, 0
 0xe3 0x00 0x00 0x00 0x00 0x2f

llvm/trunk/test/MC/SystemZ/insn-bad-z196.s

#CHECK: risblg  %r0,%r0,256,0,0
   risblg  %r0,%r0,0,0,-1
   risblg  %r0,%r0,0,0,64
   risblg  %r0,%r0,0,-1,0
   risblg  %r0,%r0,0,256,0
   risblg  %r0,%r0,-1,0,0
   risblg  %r0,%r0,256,0,0
 
 #CHECK: error: invalid operand
+#CHECK: slak  %r0,%r0,-524289
+#CHECK: error: invalid operand
+#CHECK: slak  %r0,%r0,524288
+#CHECK: error: %r0 used in an address
+#CHECK: slak  %r0,%r0,0(%r0)
+#CHECK: error: invalid use of indexed addressing
+#CHECK: slak  %r0,%r0,0(%r1,%r2)
+
+  slak  %r0,%r0,-524289
+  slak  %r0,%r0,524288
+  slak  %r0,%r0,0(%r0)
+  slak  %r0,%r0,0(%r1,%r2)
+
+#CHECK: error: invalid operand
 #CHECK: sllk  %r0,%r0,-524289
 #CHECK: error: invalid operand
 #CHECK: sllk  %r0,%r0,524288
 #CHECK: error: %r0 used in an address
 #CHECK: sllk  %r0,%r0,0(%r0)
 #CHECK: error: invalid use of indexed addressing
 #CHECK: sllk  %r0,%r0,0(%r1,%r2)
 

llvm/trunk/test/MC/SystemZ/insn-bad.s

 #CHECK: dxbr  %f0, %f2
 #CHECK: error: invalid register pair
 #CHECK: dxbr  %f2, %f0
 
   dxbr  %f0, %f2
   dxbr  %f2, %f0
 
 #CHECK: error: invalid operand
+#CHECK: ex      %r0, -1
+#CHECK: error: invalid operand
+#CHECK: ex      %r0, 4096
+
+        ex      %r0, -1
+        ex      %r0, 4096
+
+#CHECK: error: invalid operand
 #CHECK: fidbr %f0, -1, %f0
 #CHECK: error: invalid operand
 #CHECK: fidbr %f0, 16, %f0
 
   fidbr %f0, -1, %f0
   fidbr %f0, 16, %f0
 
 #CHECK: error: {{(instruction requires: fp-extension)?}}

 #CHECK: ic  %r0, -1
 #CHECK: error: invalid operand
 #CHECK: ic  %r0, 4096
 
   ic  %r0, -1
   ic  %r0, 4096
 
 #CHECK: error: invalid operand
+#CHECK: icm %r0, 0, -1
+#CHECK: error: invalid operand
+#CHECK: icm %r0, 0, 4096
+#CHECK: error: invalid operand
+#CHECK: icm %r0, -1, 0
+#CHECK: error: invalid operand
+#CHECK: icm %r0, 16, 0
+
+  icm %r0, 0, -1
+  icm %r0, 0, 4096
+  icm %r0, -1, 0
+  icm %r0, 16, 0
+
+#CHECK: error: invalid operand
+#CHECK: icmh  %r0, 0, -524289
+#CHECK: error: invalid operand
+#CHECK: icmh  %r0, 0, 524288
+#CHECK: error: invalid operand
+#CHECK: icmh  %r0, -1, 0
+#CHECK: error: invalid operand
+#CHECK: icmh  %r0, 16, 0
+
+  icmh  %r0, 0, -524289
+  icmh  %r0, 0, 524288
+  icmh  %r0, -1, 0
+  icmh  %r0, 16, 0
+
+#CHECK: error: invalid operand
+#CHECK: icmy  %r0, 0, -524289
+#CHECK: error: invalid operand
+#CHECK: icmy  %r0, 0, 524288
+#CHECK: error: invalid operand
+#CHECK: icmy  %r0, -1, 0
+#CHECK: error: invalid operand
+#CHECK: icmy  %r0, 16, 0
+
+  icmy  %r0, 0, -524289
+  icmy  %r0, 0, 524288
+  icmy  %r0, -1, 0
+  icmy  %r0, 16, 0
+
+#CHECK: error: invalid operand
 #CHECK: icy %r0, -524289
 #CHECK: error: invalid operand
 #CHECK: icy %r0, 524288
 
   icy %r0, -524289
   icy %r0, 524288
 
 #CHECK: error: invalid operand

 #CHECK: llill %r0, -1
 #CHECK: error: invalid operand
 #CHECK: llill %r0, 0x10000
 
   llill %r0, -1
   llill %r0, 0x10000
 
 #CHECK: error: invalid operand
+#CHECK: lm  %r0, %r0, 4096
+#CHECK: error: invalid use of indexed addressing
+#CHECK: lm  %r0, %r0, 0(%r1,%r2)
+
+  lm  %r0, %r0, 4096
+  lm  %r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
 #CHECK: lmg %r0, %r0, -524289
 #CHECK: error: invalid operand
 #CHECK: lmg %r0, %r0, 524288
 #CHECK: error: invalid use of indexed addressing
 #CHECK: lmg %r0, %r0, 0(%r1,%r2)
 
   lmg %r0, %r0, -524289
   lmg %r0, %r0, 524288
   lmg  %r0, %r0, 0(%r1,%r2)
 
+#CHECK: error: invalid operand
+#CHECK: lmh %r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: lmh %r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: lmh %r0, %r0, 0(%r1,%r2)
+
+  lmh %r0, %r0, -524289
+  lmh %r0, %r0, 524288
+  lmh  %r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: lmy %r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: lmy %r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: lmy %r0, %r0, 0(%r1,%r2)
+
+  lmy %r0, %r0, -524289
+  lmy %r0, %r0, 524288
+  lmy  %r0, %r0, 0(%r1,%r2)
+
 #CHECK: error: invalid register pair
 #CHECK: lnxbr %f0, %f2
 #CHECK: error: invalid register pair
 #CHECK: lnxbr %f2, %f0
 
   lnxbr %f0, %f2
   lnxbr %f2, %f0
 
#CHECK: slgfi %r0, (1 << 32)
   slgfi %r0, (1 << 32)
 
 #CHECK: error: {{(instruction requires: distinct-ops)?}}
 #CHECK: slgrk %r2,%r3,%r4
 
   slgrk %r2,%r3,%r4
 
 #CHECK: error: invalid operand
+#CHECK: sla %r0,-1
+#CHECK: error: invalid operand
+#CHECK: sla %r0,4096
+#CHECK: error: %r0 used in an address
+#CHECK: sla %r0,0(%r0)
+#CHECK: error: invalid use of indexed addressing
+#CHECK: sla %r0,0(%r1,%r2)
+
+  sla %r0,-1
+  sla %r0,4096
+  sla %r0,0(%r0)
+  sla %r0,0(%r1,%r2)
+
+#CHECK: error: {{(instruction requires: distinct-ops)?}}
+#CHECK: slak  %r2,%r3,4(%r5)
+
+  slak  %r2,%r3,4(%r5)
+
+#CHECK: error: invalid operand
 #CHECK: sll %r0,-1
 #CHECK: error: invalid operand
 #CHECK: sll %r0,4096
 #CHECK: error: %r0 used in an address
 #CHECK: sll %r0,0(%r0)
 #CHECK: error: invalid use of indexed addressing
 #CHECK: sll %r0,0(%r1,%r2)
 
#CHECK: sthy  %r0, 524288
   sthy  %r0, 524288
 
 #CHECK: error: {{(instruction requires: high-word)?}}
 #CHECK: stfh  %r0, 0
 
   stfh  %r0, 0
 
 #CHECK: error: invalid operand
+#CHECK: stm %r0, %r0, 4096
+#CHECK: error: invalid use of indexed addressing
+#CHECK: stm %r0, %r0, 0(%r1,%r2)
+
+  stm %r0, %r0, 4096
+  stm  %r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
 #CHECK: stmg  %r0, %r0, -524289
 #CHECK: error: invalid operand
 #CHECK: stmg  %r0, %r0, 524288
 #CHECK: error: invalid use of indexed addressing
 #CHECK: stmg  %r0, %r0, 0(%r1,%r2)
 
   stmg  %r0, %r0, -524289
   stmg  %r0, %r0, 524288
   stmg  %r0, %r0, 0(%r1,%r2)
 
+#CHECK: error: invalid operand
+#CHECK: stmh  %r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: stmh  %r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: stmh  %r0, %r0, 0(%r1,%r2)
+
+  stmh  %r0, %r0, -524289
+  stmh  %r0, %r0, 524288
+  stmh  %r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: stmy  %r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: stmy  %r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: stmy  %r0, %r0, 0(%r1,%r2)
+
+  stmy  %r0, %r0, -524289
+  stmy  %r0, %r0, 524288
+  stmy  %r0, %r0, 0(%r1,%r2)
+
 #CHECK: error: offset out of range
 #CHECK: strl  %r0, -0x1000000002
 #CHECK: error: offset out of range
 #CHECK: strl  %r0, -1
 #CHECK: error: offset out of range
 #CHECK: strl  %r0, 1
 #CHECK: error: offset out of range
 #CHECK: strl  %r0, 0x100000000

 #CHECK: tmhl  %r0, -1
 #CHECK: error: invalid operand
 #CHECK: tmhl  %r0, 0x10000
 
   tmhl  %r0, -1
   tmhl  %r0, 0x10000
 
 #CHECK: error: invalid operand
+#CHECK: tmh %r0, -1
+#CHECK: error: invalid operand
+#CHECK: tmh %r0, 0x10000
+
+  tmh %r0, -1
+  tmh %r0, 0x10000
+
+#CHECK: error: invalid operand
 #CHECK: tmlh  %r0, -1
 #CHECK: error: invalid operand
 #CHECK: tmlh  %r0, 0x10000
 
   tmlh  %r0, -1
   tmlh  %r0, 0x10000
 
 #CHECK: error: invalid operand
+#CHECK: tml %r0, -1
+#CHECK: error: invalid operand
+#CHECK: tml %r0, 0x10000
+
+  tml %r0, -1
+  tml %r0, 0x10000
+
+#CHECK: error: invalid operand
 #CHECK: tmll  %r0, -1
 #CHECK: error: invalid operand
 #CHECK: tmll  %r0, 0x10000
 
   tmll  %r0, -1
   tmll  %r0, 0x10000
 
 #CHECK: error: invalid operand

llvm/trunk/test/MC/SystemZ/insn-good-z196.s

 #CHECK: sgrk  %r7, %r8, %r9           # encoding: [0xb9,0xe9,0x90,0x78]
 
   sgrk  %r0,%r0,%r0
   sgrk  %r0,%r0,%r15
   sgrk  %r0,%r15,%r0
   sgrk  %r15,%r0,%r0
   sgrk  %r7,%r8,%r9
 
+#CHECK: slak  %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xdd]
+#CHECK: slak  %r15, %r1, 0            # encoding: [0xeb,0xf1,0x00,0x00,0x00,0xdd]
+#CHECK: slak  %r1, %r15, 0            # encoding: [0xeb,0x1f,0x00,0x00,0x00,0xdd]
+#CHECK: slak  %r15, %r15, 0           # encoding: [0xeb,0xff,0x00,0x00,0x00,0xdd]
+#CHECK: slak  %r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xdd]
+#CHECK: slak  %r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xdd]
+#CHECK: slak  %r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0xdd]
+#CHECK: slak  %r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xdd]
+#CHECK: slak  %r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0xdd]
+#CHECK: slak  %r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xdd]
+#CHECK: slak  %r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xdd]
+#CHECK: slak  %r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xdd]
+
+  slak  %r0,%r0,0
+  slak  %r15,%r1,0
+  slak  %r1,%r15,0
+  slak  %r15,%r15,0
+  slak  %r0,%r0,-524288
+  slak  %r0,%r0,-1
+  slak  %r0,%r0,1
+  slak  %r0,%r0,524287
+  slak  %r0,%r0,0(%r1)
+  slak  %r0,%r0,0(%r15)
+  slak  %r0,%r0,524287(%r1)
+  slak  %r0,%r0,524287(%r15)
+
 #CHECK: slgrk %r0, %r0, %r0           # encoding: [0xb9,0xeb,0x00,0x00]
 #CHECK: slgrk %r0, %r0, %r15          # encoding: [0xb9,0xeb,0xf0,0x00]
 #CHECK: slgrk %r0, %r15, %r0          # encoding: [0xb9,0xeb,0x00,0x0f]
 #CHECK: slgrk %r15, %r0, %r0          # encoding: [0xb9,0xeb,0x00,0xf0]
 #CHECK: slgrk %r7, %r8, %r9           # encoding: [0xb9,0xeb,0x90,0x78]
 
   slgrk %r0,%r0,%r0
   slgrk %r0,%r0,%r15

llvm/trunk/test/MC/SystemZ/insn-good.s

 #CHECK: ear %r15, %a15              # encoding: [0xb2,0x4f,0x00,0xff]
 
   ear %r0, %a0
   ear %r0, %a15
   ear %r15, %a0
   ear %r7, %a8
   ear %r15, %a15
 
+#CHECK: ex  %r0, 0                  # encoding: [0x44,0x00,0x00,0x00]
+#CHECK: ex  %r0, 4095               # encoding: [0x44,0x00,0x0f,0xff]
+#CHECK: ex  %r0, 0(%r1)             # encoding: [0x44,0x00,0x10,0x00]
+#CHECK: ex  %r0, 0(%r15)            # encoding: [0x44,0x00,0xf0,0x00]
+#CHECK: ex  %r0, 4095(%r1,%r15)     # encoding: [0x44,0x01,0xff,0xff]
+#CHECK: ex  %r0, 4095(%r15,%r1)     # encoding: [0x44,0x0f,0x1f,0xff]
+#CHECK: ex  %r15, 0                 # encoding: [0x44,0xf0,0x00,0x00]
+
+  ex  %r0, 0
+  ex  %r0, 4095
+  ex  %r0, 0(%r1)
+  ex  %r0, 0(%r15)
+  ex  %r0, 4095(%r1,%r15)
+  ex  %r0, 4095(%r15,%r1)
+  ex  %r15, 0
+
+#CHECK: exrl  %r0, .[[LAB:L.*]]-4294967296 # encoding: [0xc6,0x00,A,A,A,A]
+#CHECK:  fixup A - offset: 2, value: (.[[LAB]]-4294967296)+2, kind: FK_390_PC32DBL
+  exrl  %r0, -0x100000000
+#CHECK: exrl  %r0, .[[LAB:L.*]]-2 # encoding: [0xc6,0x00,A,A,A,A]
+#CHECK:  fixup A - offset: 2, value: (.[[LAB]]-2)+2, kind: FK_390_PC32DBL
+  exrl  %r0, -2
+#CHECK: exrl  %r0, .[[LAB:L.*]] # encoding: [0xc6,0x00,A,A,A,A]
+#CHECK:  fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC32DBL
+  exrl  %r0, 0
+#CHECK: exrl  %r0, .[[LAB:L.*]][phone] # encoding: [0xc6,0x00,A,A,A,A]
+#CHECK:  fixup A - offset: 2, value: (.[[LAB]][phone])+2, kind: FK_390_PC32DBL
+  exrl  %r0, 0xfffffffe
+
+#CHECK: exrl  %r0, foo                # encoding: [0xc6,0x00,A,A,A,A]
+# fixup A - offset: 2, value: foo+2, kind: FK_390_PC32DBL
+#CHECK: exrl  %r15, foo               # encoding: [0xc6,0xf0,A,A,A,A]
+# fixup A - offset: 2, value: foo+2, kind: FK_390_PC32DBL
+
+  exrl  %r0,foo
+  exrl  %r15,foo
+
+#CHECK: exrl  %r3, bar+100            # encoding: [0xc6,0x30,A,A,A,A]
+# fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC32DBL
+#CHECK: exrl  %r4, bar+100            # encoding: [0xc6,0x40,A,A,A,A]
+# fixup A - offset: 2, value: (bar+100)+2, kind: FK_390_PC32DBL
+
+  exrl  %r3,bar+100
+  exrl  %r4,bar+100
+
+#CHECK: exrl  %r7, frob@PLT           # encoding: [0xc6,0x70,A,A,A,A]
+# fixup A - offset: 2, value: frob@PLT+2, kind: FK_390_PC32DBL
+#CHECK: exrl  %r8, frob@PLT           # encoding: [0xc6,0x80,A,A,A,A]
+# fixup A - offset: 2, value: frob@PLT+2, kind: FK_390_PC32DBL
+
+  exrl  %r7,frob@PLT
+  exrl  %r8,frob@PLT
+
 #CHECK: fidbr %f0, 0, %f0             # encoding: [0xb3,0x5f,0x00,0x00]
 #CHECK: fidbr %f0, 0, %f15            # encoding: [0xb3,0x5f,0x00,0x0f]
 #CHECK: fidbr %f0, 15, %f0            # encoding: [0xb3,0x5f,0xf0,0x00]
 #CHECK: fidbr %f4, 5, %f6             # encoding: [0xb3,0x5f,0x50,0x46]
 #CHECK: fidbr %f15, 0, %f0            # encoding: [0xb3,0x5f,0x00,0xf0]
 
   fidbr %f0, 0, %f0
   fidbr %f0, 0, %f15
#CHECK: ic  %r15, 0                 # encoding: [0x43,0xf0,0x00,0x00]
   ic  %r0, 0
   ic  %r0, 4095
   ic  %r0, 0(%r1)
   ic  %r0, 0(%r15)
   ic  %r0, 4095(%r1,%r15)
   ic  %r0, 4095(%r15,%r1)
   ic  %r15, 0
 
+#CHECK: icm %r0, 0, 0               # encoding: [0xbf,0x00,0x00,0x00]
+#CHECK: icm %r0, 15, 4095           # encoding: [0xbf,0x0f,0x0f,0xff]
+#CHECK: icm %r0, 0, 0(%r1)          # encoding: [0xbf,0x00,0x10,0x00]
+#CHECK: icm %r0, 0, 0(%r15)         # encoding: [0xbf,0x00,0xf0,0x00]
+#CHECK: icm %r15, 15, 4095(%r1)     # encoding: [0xbf,0xff,0x1f,0xff]
+#CHECK: icm %r0, 0, 4095(%r15)      # encoding: [0xbf,0x00,0xff,0xff]
+#CHECK: icm %r15, 0, 0              # encoding: [0xbf,0xf0,0x00,0x00]
+
+  icm %r0, 0, 0
+  icm %r0, 15, 4095
+  icm %r0, 0, 0(%r1)
+  icm %r0, 0, 0(%r15)
+  icm %r15, 15, 4095(%r1)
+  icm %r0, 0, 4095(%r15)
+  icm %r15, 0, 0
+
+#CHECK: icmh  %r0, 0, -524288            # encoding: [0xeb,0x00,0x00,0x00,0x80,0x80]
+#CHECK: icmh  %r0, 0, -1                 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x80]
+#CHECK: icmh  %r0, 15, 0                 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x80]
+#CHECK: icmh  %r0, 15, 1                 # encoding: [0xeb,0x0f,0x00,0x01,0x00,0x80]
+#CHECK: icmh  %r0, 8, 524287             # encoding: [0xeb,0x08,0x0f,0xff,0x7f,0x80]
+#CHECK: icmh  %r0, 8, 0(%r1)             # encoding: [0xeb,0x08,0x10,0x00,0x00,0x80]
+#CHECK: icmh  %r0, 4, 0(%r15)            # encoding: [0xeb,0x04,0xf0,0x00,0x00,0x80]
+#CHECK: icmh  %r0, 4, 524287(%r15)       # encoding: [0xeb,0x04,0xff,0xff,0x7f,0x80]
+#CHECK: icmh  %r0, 0, 524287(%r1)        # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0x80]
+#CHECK: icmh  %r15, 0, 0                 # encoding: [0xeb,0xf0,0x00,0x00,0x00,0x80]
+
+  icmh  %r0, 0, -524288
+  icmh  %r0, 0, -1
+  icmh  %r0, 15, 0
+  icmh  %r0, 15, 1
+  icmh  %r0, 8, 524287
+  icmh  %r0, 8, 0(%r1)
+  icmh  %r0, 4, 0(%r15)
+  icmh  %r0, 4, 524287(%r15)
+  icmh  %r0, 0, 524287(%r1)
+  icmh  %r15, 0, 0
+
+#CHECK: icmy  %r0, 0, -524288            # encoding: [0xeb,0x00,0x00,0x00,0x80,0x81]
+#CHECK: icmy  %r0, 0, -1                 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x81]
+#CHECK: icmy  %r0, 15, 0                 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x81]
+#CHECK: icmy  %r0, 15, 1                 # encoding: [0xeb,0x0f,0x00,0x01,0x00,0x81]
+#CHECK: icmy  %r0, 8, 524287             # encoding: [0xeb,0x08,0x0f,0xff,0x7f,0x81]
+#CHECK: icmy  %r0, 8, 0(%r1)             # encoding: [0xeb,0x08,0x10,0x00,0x00,0x81]
+#CHECK: icmy  %r0, 4, 0(%r15)            # encoding: [0xeb,0x04,0xf0,0x00,0x00,0x81]
+#CHECK: icmy  %r0, 4, 524287(%r15)       # encoding: [0xeb,0x04,0xff,0xff,0x7f,0x81]
+#CHECK: icmy  %r0, 0, 524287(%r1)        # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0x81]
+#CHECK: icmy  %r15, 0, 0                 # encoding: [0xeb,0xf0,0x00,0x00,0x00,0x81]
+
+  icmy  %r0, 0, -524288
+  icmy  %r0, 0, -1
+  icmy  %r0, 15, 0
+  icmy  %r0, 15, 1
+  icmy  %r0, 8, 524287
+  icmy  %r0, 8, 0(%r1)
+  icmy  %r0, 4, 0(%r15)
+  icmy  %r0, 4, 524287(%r15)
+  icmy  %r0, 0, 524287(%r1)
+  icmy  %r15, 0, 0
+
 #CHECK: icy %r0, -524288            # encoding: [0xe3,0x00,0x00,0x00,0x80,0x73]
 #CHECK: icy %r0, -1                 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x73]
 #CHECK: icy %r0, 0                  # encoding: [0xe3,0x00,0x00,0x00,0x00,0x73]
 #CHECK: icy %r0, 1                  # encoding: [0xe3,0x00,0x00,0x01,0x00,0x73]
 #CHECK: icy %r0, 524287             # encoding: [0xe3,0x00,0x0f,0xff,0x7f,0x73]
 #CHECK: icy %r0, 0(%r1)             # encoding: [0xe3,0x00,0x10,0x00,0x00,0x73]
 #CHECK: icy %r0, 0(%r15)            # encoding: [0xe3,0x00,0xf0,0x00,0x00,0x73]
 #CHECK: icy %r0, 524287(%r1,%r15)   # encoding: [0xe3,0x01,0xff,0xff,0x7f,0x73]

 #CHECK: llill %r0, 65535              # encoding: [0xa5,0x0f,0xff,0xff]
 #CHECK: llill %r15, 0                 # encoding: [0xa5,0xff,0x00,0x00]
 
   llill %r0, 0
   llill %r0, 0x8000
   llill %r0, 0xffff
   llill %r15, 0
 
+#CHECK: lm  %r0, %r0, 0             # encoding: [0x98,0x00,0x00,0x00]
+#CHECK: lm  %r0, %r15, 0            # encoding: [0x98,0x0f,0x00,0x00]
+#CHECK: lm  %r14, %r15, 0           # encoding: [0x98,0xef,0x00,0x00]
+#CHECK: lm  %r15, %r15, 0           # encoding: [0x98,0xff,0x00,0x00]
+#CHECK: lm  %r0, %r0, 4095          # encoding: [0x98,0x00,0x0f,0xff]
+#CHECK: lm  %r0, %r0, 1             # encoding: [0x98,0x00,0x00,0x01]
+#CHECK: lm  %r0, %r0, 0(%r1)        # encoding: [0x98,0x00,0x10,0x00]
+#CHECK: lm  %r0, %r0, 0(%r15)       # encoding: [0x98,0x00,0xf0,0x00]
+#CHECK: lm  %r0, %r0, 4095(%r1)     # encoding: [0x98,0x00,0x1f,0xff]
+#CHECK: lm  %r0, %r0, 4095(%r15)    # encoding: [0x98,0x00,0xff,0xff]
+
+  lm  %r0,%r0,0
+  lm  %r0,%r15,0
+  lm  %r14,%r15,0
+  lm  %r15,%r15,0
+  lm  %r0,%r0,4095
+  lm  %r0,%r0,1
+  lm  %r0,%r0,0(%r1)
+  lm  %r0,%r0,0(%r15)
+  lm  %r0,%r0,4095(%r1)
+  lm  %r0,%r0,4095(%r15)
+
 #CHECK: lmg %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x04]
 #CHECK: lmg %r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x04]
 #CHECK: lmg %r14, %r15, 0           # encoding: [0xeb,0xef,0x00,0x00,0x00,0x04]
 #CHECK: lmg %r15, %r15, 0           # encoding: [0xeb,0xff,0x00,0x00,0x00,0x04]
 #CHECK: lmg %r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0x04]
 #CHECK: lmg %r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x04]
 #CHECK: lmg %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x04]
 #CHECK: lmg %r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0x04]
#CHECK: lmg %r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0x04]
   lmg %r0,%r0,0
   lmg %r0,%r0,1
   lmg %r0,%r0,524287
   lmg %r0,%r0,0(%r1)
   lmg %r0,%r0,0(%r15)
   lmg %r0,%r0,524287(%r1)
   lmg %r0,%r0,524287(%r15)
 
+#CHECK: lmh %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x96]
+#CHECK: lmh %r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x96]
+#CHECK: lmh %r14, %r15, 0           # encoding: [0xeb,0xef,0x00,0x00,0x00,0x96]
+#CHECK: lmh %r15, %r15, 0           # encoding: [0xeb,0xff,0x00,0x00,0x00,0x96]
+#CHECK: lmh %r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0x96]
+#CHECK: lmh %r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x96]
+#CHECK: lmh %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x96]
+#CHECK: lmh %r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0x96]
+#CHECK: lmh %r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0x96]
+#CHECK: lmh %r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0x96]
+#CHECK: lmh %r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0x96]
+#CHECK: lmh %r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0x96]
+#CHECK: lmh %r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0x96]
+
+  lmh %r0,%r0,0
+  lmh %r0,%r15,0
+  lmh %r14,%r15,0
+  lmh %r15,%r15,0
+  lmh %r0,%r0,-524288
+  lmh %r0,%r0,-1
+  lmh %r0,%r0,0
+  lmh %r0,%r0,1
+  lmh %r0,%r0,524287
+  lmh %r0,%r0,0(%r1)
+  lmh %r0,%r0,0(%r15)
+  lmh %r0,%r0,524287(%r1)
+  lmh %r0,%r0,524287(%r15)
+
+#CHECK: lmy %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x98]
+#CHECK: lmy %r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x98]
+#CHECK: lmy %r14, %r15, 0           # encoding: [0xeb,0xef,0x00,0x00,0x00,0x98]
+#CHECK: lmy %r15, %r15, 0           # encoding: [0xeb,0xff,0x00,0x00,0x00,0x98]
+#CHECK: lmy %r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0x98]
+#CHECK: lmy %r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x98]
+#CHECK: lmy %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x98]
+#CHECK: lmy %r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0x98]
+#CHECK: lmy %r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0x98]
+#CHECK: lmy %r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0x98]
+#CHECK: lmy %r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0x98]
+#CHECK: lmy %r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0x98]
+#CHECK: lmy %r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0x98]
+
+  lmy %r0,%r0,0
+  lmy %r0,%r15,0
+  lmy %r14,%r15,0
+  lmy %r15,%r15,0
+  lmy %r0,%r0,-524288
+  lmy %r0,%r0,-1
+  lmy %r0,%r0,0
+  lmy %r0,%r0,1
+  lmy %r0,%r0,524287
+  lmy %r0,%r0,0(%r1)
+  lmy %r0,%r0,0(%r15)
+  lmy %r0,%r0,524287(%r1)
+  lmy %r0,%r0,524287(%r15)
+
 #CHECK: lndbr %f0, %f9                # encoding: [0xb3,0x11,0x00,0x09]
 #CHECK: lndbr %f0, %f15               # encoding: [0xb3,0x11,0x00,0x0f]
 #CHECK: lndbr %f15, %f0               # encoding: [0xb3,0x11,0x00,0xf0]
 #CHECK: lndbr %f15, %f9               # encoding: [0xb3,0x11,0x00,0xf9]
 
   lndbr %f0,%f9
   lndbr %f0,%f15
   lndbr %f15,%f0

 #CHECK: slgr  %r15, %r0               # encoding: [0xb9,0x0b,0x00,0xf0]
 #CHECK: slgr  %r7, %r8                # encoding: [0xb9,0x0b,0x00,0x78]
 
   slgr  %r0,%r0
   slgr  %r0,%r15
   slgr  %r15,%r0
   slgr  %r7,%r8
 
+#CHECK: sla %r0, 0                  # encoding: [0x8b,0x00,0x00,0x00]
+#CHECK: sla %r7, 0                  # encoding: [0x8b,0x70,0x00,0x00]
+#CHECK: sla %r15, 0                 # encoding: [0x8b,0xf0,0x00,0x00]
+#CHECK: sla %r0, 4095               # encoding: [0x8b,0x00,0x0f,0xff]
+#CHECK: sla %r0, 0(%r1)             # encoding: [0x8b,0x00,0x10,0x00]
+#CHECK: sla %r0, 0(%r15)            # encoding: [0x8b,0x00,0xf0,0x00]
+#CHECK: sla %r0, 4095(%r1)          # encoding: [0x8b,0x00,0x1f,0xff]
+#CHECK: sla %r0, 4095(%r15)         # encoding: [0x8b,0x00,0xff,0xff]
+
+  sla %r0,0
+  sla %r7,0
+  sla %r15,0
+  sla %r0,4095
+  sla %r0,0(%r1)
+  sla %r0,0(%r15)
+  sla %r0,4095(%r1)
+  sla %r0,4095(%r15)
+
 #CHECK: sll %r0, 0                  # encoding: [0x89,0x00,0x00,0x00]
 #CHECK: sll %r7, 0                  # encoding: [0x89,0x70,0x00,0x00]
 #CHECK: sll %r15, 0                 # encoding: [0x89,0xf0,0x00,0x00]
 #CHECK: sll %r0, 4095               # encoding: [0x89,0x00,0x0f,0xff]
 #CHECK: sll %r0, 0(%r1)             # encoding: [0x89,0x00,0x10,0x00]
 #CHECK: sll %r0, 0(%r15)            # encoding: [0x89,0x00,0xf0,0x00]
 #CHECK: sll %r0, 4095(%r1)          # encoding: [0x89,0x00,0x1f,0xff]
 #CHECK: sll %r0, 4095(%r15)         # encoding: [0x89,0x00,0xff,0xff]
#CHECK: sthy  %r15, 0                 # encoding: [0xe3,0xf0,0x00,0x00,0x00,0x70]
   sthy  %r0, 1
   sthy  %r0, 524287
   sthy  %r0, 0(%r1)
   sthy  %r0, 0(%r15)
   sthy  %r0, 524287(%r1,%r15)
   sthy  %r0, 524287(%r15,%r1)
   sthy  %r15, 0
 
+#CHECK: stm %r0, %r0, 0             # encoding: [0x90,0x00,0x00,0x00]
+#CHECK: stm %r0, %r15, 0            # encoding: [0x90,0x0f,0x00,0x00]
+#CHECK: stm %r14, %r15, 0           # encoding: [0x90,0xef,0x00,0x00]
+#CHECK: stm %r15, %r15, 0           # encoding: [0x90,0xff,0x00,0x00]
+#CHECK: stm %r0, %r0, 4095          # encoding: [0x90,0x00,0x0f,0xff]
+#CHECK: stm %r0, %r0, 1             # encoding: [0x90,0x00,0x00,0x01]
+#CHECK: stm %r0, %r0, 0(%r1)        # encoding: [0x90,0x00,0x10,0x00]
+#CHECK: stm %r0, %r0, 0(%r15)       # encoding: [0x90,0x00,0xf0,0x00]
+#CHECK: stm %r0, %r0, 4095(%r1)     # encoding: [0x90,0x00,0x1f,0xff]
+#CHECK: stm %r0, %r0, 4095(%r15)    # encoding: [0x90,0x00,0xff,0xff]
+
+  stm %r0,%r0,0
+  stm %r0,%r15,0
+  stm %r14,%r15,0
+  stm %r15,%r15,0
+  stm %r0,%r0,4095
+  stm %r0,%r0,1
+  stm %r0,%r0,0(%r1)
+  stm %r0,%r0,0(%r15)
+  stm %r0,%r0,4095(%r1)
+  stm %r0,%r0,4095(%r15)
+
 #CHECK: stmg  %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x24]
 #CHECK: stmg  %r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x24]
 #CHECK: stmg  %r14, %r15, 0           # encoding: [0xeb,0xef,0x00,0x00,0x00,0x24]
 #CHECK: stmg  %r15, %r15, 0           # encoding: [0xeb,0xff,0x00,0x00,0x00,0x24]
 #CHECK: stmg  %r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0x24]
 #CHECK: stmg  %r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x24]
 #CHECK: stmg  %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x24]
 #CHECK: stmg  %r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0x24]
#CHECK: stmg  %r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0x24]
   stmg  %r0,%r0,0
   stmg  %r0,%r0,1
   stmg  %r0,%r0,524287
   stmg  %r0,%r0,0(%r1)
   stmg  %r0,%r0,0(%r15)
   stmg  %r0,%r0,524287(%r1)
   stmg  %r0,%r0,524287(%r15)
 
+#CHECK: stmh  %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x26]
+#CHECK: stmh  %r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x26]
+#CHECK: stmh  %r14, %r15, 0           # encoding: [0xeb,0xef,0x00,0x00,0x00,0x26]
+#CHECK: stmh  %r15, %r15, 0           # encoding: [0xeb,0xff,0x00,0x00,0x00,0x26]
+#CHECK: stmh  %r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0x26]
+#CHECK: stmh  %r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x26]
+#CHECK: stmh  %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x26]
+#CHECK: stmh  %r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0x26]
+#CHECK: stmh  %r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0x26]
+#CHECK: stmh  %r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0x26]
+#CHECK: stmh  %r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0x26]
+#CHECK: stmh  %r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0x26]
+#CHECK: stmh  %r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0x26]
+
+  stmh  %r0,%r0,0
+  stmh  %r0,%r15,0
+  stmh  %r14,%r15,0
+  stmh  %r15,%r15,0
+  stmh  %r0,%r0,-524288
+  stmh  %r0,%r0,-1
+  stmh  %r0,%r0,0
+  stmh  %r0,%r0,1
+  stmh  %r0,%r0,524287
+  stmh  %r0,%r0,0(%r1)
+  stmh  %r0,%r0,0(%r15)
+  stmh  %r0,%r0,524287(%r1)
+  stmh  %r0,%r0,524287(%r15)
+
+#CHECK: stmy  %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x90]
+#CHECK: stmy  %r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x90]
+#CHECK: stmy  %r14, %r15, 0           # encoding: [0xeb,0xef,0x00,0x00,0x00,0x90]
+#CHECK: stmy  %r15, %r15, 0           # encoding: [0xeb,0xff,0x00,0x00,0x00,0x90]
+#CHECK: stmy  %r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0x90]
+#CHECK: stmy  %r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x90]
+#CHECK: stmy  %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x90]
+#CHECK: stmy  %r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0x90]
+#CHECK: stmy  %r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0x90]
+#CHECK: stmy  %r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0x90]
+#CHECK: stmy  %r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0x90]
+#CHECK: stmy  %r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0x90]
+#CHECK: stmy  %r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0x90]
+
+  stmy  %r0,%r0,0
+  stmy  %r0,%r15,0
+  stmy  %r14,%r15,0
+  stmy  %r15,%r15,0
+  stmy  %r0,%r0,-524288
+  stmy  %r0,%r0,-1
+  stmy  %r0,%r0,0
+  stmy  %r0,%r0,1
+  stmy  %r0,%r0,524287
+  stmy  %r0,%r0,0(%r1)
+  stmy  %r0,%r0,0(%r15)
+  stmy  %r0,%r0,524287(%r1)
+  stmy  %r0,%r0,524287(%r15)
+
 #CHECK: strl  %r0, .[[LAB:L.*]]-4294967296 # encoding: [0xc4,0x0f,A,A,A,A]
 #CHECK:  fixup A - offset: 2, value: (.[[LAB]]-4294967296)+2, kind: FK_390_PC32DBL
   strl  %r0, -0x100000000
 #CHECK: strl  %r0, .[[LAB:L.*]]-2 # encoding: [0xc4,0x0f,A,A,A,A]
 #CHECK:  fixup A - offset: 2, value: (.[[LAB]]-2)+2, kind: FK_390_PC32DBL
   strl  %r0, -2
 #CHECK: strl  %r0, .[[LAB:L.*]] # encoding: [0xc4,0x0f,A,A,A,A]
 #CHECK:  fixup A - offset: 2, value: .[[LAB]]+2, kind: FK_390_PC32DBL
#CHECK: tmhl  %r15, 0                 # encoding: [0xa7,0xf3,0x00,0x00]
   tmhl  %r0, 0xffff
   tmhl  %r15, 0
 
 #CHECK: tmlh  %r0, 0                  # encoding: [0xa7,0x00,0x00,0x00]
 #CHECK: tmlh  %r0, 32768              # encoding: [0xa7,0x00,0x80,0x00]
 #CHECK: tmlh  %r0, 65535              # encoding: [0xa7,0x00,0xff,0xff]
 #CHECK: tmlh  %r15, 0                 # encoding: [0xa7,0xf0,0x00,0x00]
 
+  tmh %r0, 0
+  tmh %r0, 0x8000
+  tmh %r0, 0xffff
+  tmh %r15, 0
+
+#CHECK: tmlh  %r0, 0                  # encoding: [0xa7,0x00,0x00,0x00]
+#CHECK: tmlh  %r0, 32768              # encoding: [0xa7,0x00,0x80,0x00]
+#CHECK: tmlh  %r0, 65535              # encoding: [0xa7,0x00,0xff,0xff]
+#CHECK: tmlh  %r15, 0                 # encoding: [0xa7,0xf0,0x00,0x00]
+
   tmlh  %r0, 0
   tmlh  %r0, 0x8000
   tmlh  %r0, 0xffff
   tmlh  %r15, 0
 
 #CHECK: tmll  %r0, 0                  # encoding: [0xa7,0x01,0x00,0x00]
 #CHECK: tmll  %r0, 32768              # encoding: [0xa7,0x01,0x80,0x00]
 #CHECK: tmll  %r0, 65535              # encoding: [0xa7,0x01,0xff,0xff]
 #CHECK: tmll  %r15, 0                 # encoding: [0xa7,0xf1,0x00,0x00]
 
+  tml %r0, 0
+  tml %r0, 0x8000
+  tml %r0, 0xffff
+  tml %r15, 0
+
+#CHECK: tmll  %r0, 0                  # encoding: [0xa7,0x01,0x00,0x00]
+#CHECK: tmll  %r0, 32768              # encoding: [0xa7,0x01,0x80,0x00]
+#CHECK: tmll  %r0, 65535              # encoding: [0xa7,0x01,0xff,0xff]
+#CHECK: tmll  %r15, 0                 # encoding: [0xa7,0xf1,0x00,0x00]
+
   tmll  %r0, 0
   tmll  %r0, 0x8000
   tmll  %r0, 0xffff
   tmll  %r15, 0
 
 #CHECK: tmy -524288, 0              # encoding: [0xeb,0x00,0x00,0x00,0x80,0x51]
 #CHECK: tmy -1, 0                   # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x51]
 #CHECK: tmy 0, 0                    # encoding: [0xeb,0x00,0x00,0x00,0x00,0x51]