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Differential D20904

[mips] Remove CPU-only triples from llvm-objdump commands.
ClosedPublic

Authored by dsanders on Jun 2 2016, 4:41 AM.

Details

Reviewers
sdardis
Commits
rG7b09493bffa6: [mips] Remove CPU-only triples from llvm-objdump commands.
rL271653: [mips] Remove CPU-only triples from llvm-objdump commands.
Summary

They aren't necessary since llvm-objdump can auto-detect the architecture.

Diff Detail

Event Timeline

dsanders updated this revision to Diff 59364.Jun 2 2016, 4:41 AM
dsanders retitled this revision from to [mips] Remove CPU-only triples from llvm-objdump commands..
dsanders updated this object.
dsanders added a reviewer: sdardis.
dsanders added a subscriber: llvm-commits.
Herald added subscribers: sdardis, dsanders, jfb. · View Herald TranscriptJun 2 2016, 4:41 AM
sdardis accepted this revision.Jun 2 2016, 7:21 AM
sdardis edited edge metadata.

LGTM.

This revision is now accepted and ready to land.Jun 2 2016, 7:21 AM
dsanders closed this revision.Jun 3 2016, 3:28 AM

Revision Contents

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test/
MC/
Mips/
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Object/
Mips/
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Diff 59364

test/MC/Mips/higher-highest-addressing.s

# RUN: llvm-mc -filetype=obj -triple=mips64el-unknown-linux -mcpu=mips64r2 %s \ # RUN: llvm-mc -filetype=obj -triple=mips64el-unknown-linux -mcpu=mips64r2 %s \
# RUN: | llvm-objdump -disassemble -triple mips64el - | FileCheck %s # RUN: | llvm-objdump -disassemble - | FileCheck %s
# RUN: llvm-mc -filetype=obj -triple=mips64el-unknown-linux -mcpu=mips64r2 %s \ # RUN: llvm-mc -filetype=obj -triple=mips64el-unknown-linux -mcpu=mips64r2 %s \
# RUN: | llvm-readobj -r | FileCheck %s -check-prefix=CHECK-REL # RUN: | llvm-readobj -r | FileCheck %s -check-prefix=CHECK-REL
# Test that R_MIPS_HIGHER and R_MIPS_HIGHEST relocations are created. By using # Test that R_MIPS_HIGHER and R_MIPS_HIGHEST relocations are created. By using
# NEXT we also test that none of the expressions from the test2 generates # NEXT we also test that none of the expressions from the test2 generates
# relocations. # relocations.
test1: test1:
# CHECK-LABEL: test1: # CHECK-LABEL: test1:
▲ Show 20 Lines • Show All 41 Lines • Show Last 20 Lines

test/MC/Mips/micromips-el-fixup-data.s

# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 \ # RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 \
# RUN: -mattr=+micromips 2>&1 -filetype=obj > %t.o # RUN: -mattr=+micromips 2>&1 -filetype=obj > %t.o
# RUN: llvm-objdump %t.o -triple mipsel -mattr=+micromips -d | FileCheck %s # RUN: llvm-objdump %t.o -mattr=+micromips -d | FileCheck %s
# Check that fixup data is written in the microMIPS specific little endian # Check that fixup data is written in the microMIPS specific little endian
# byte order. # byte order.
.text .text
.globl main .globl main
.align 2 .align 2
.type main,@function .type main,@function
Show All 14 Lines

test/MC/Mips/mips64extins.ll

; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 -target-abi=n64 %s -o - \ ; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 -target-abi=n64 %s -o - \
; RUN: | llvm-objdump -disassemble -triple mips64el -mattr +mips64r2 - \ ; RUN: | llvm-objdump -disassemble -mattr +mips64r2 - | FileCheck %s
; RUN: | FileCheck %s
define i64 @dext(i64 %i) nounwind readnone { define i64 @dext(i64 %i) nounwind readnone {
entry: entry:
; CHECK: dext ${{[0-9]+}}, ${{[0-9]+}}, 5, 10 ; CHECK: dext ${{[0-9]+}}, ${{[0-9]+}}, 5, 10
%shr = lshr i64 %i, 5 %shr = lshr i64 %i, 5
%and = and i64 %shr, 1023 %and = and i64 %shr, 1023
ret i64 %and ret i64 %and
} }
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test/MC/Mips/mips64shift.ll

; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 -disable-mips-delay-filler %s -o - \ ; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 -disable-mips-delay-filler %s -o - \
; RUN: | llvm-objdump -disassemble -triple mips64el - | FileCheck %s ; RUN: | llvm-objdump -disassemble - | FileCheck %s
; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 %s -o - \ ; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 %s -o - \
; RUN: | llvm-objdump -disassemble -triple mips64el - | FileCheck %s ; RUN: | llvm-objdump -disassemble - | FileCheck %s
define i64 @f3(i64 %a0) nounwind readnone { define i64 @f3(i64 %a0) nounwind readnone {
entry: entry:
; CHECK: dsll ${{[0-9]+}}, ${{[0-9]+}}, 10 ; CHECK: dsll ${{[0-9]+}}, ${{[0-9]+}}, 10
%shl = shl i64 %a0, 10 %shl = shl i64 %a0, 10
ret i64 %shl ret i64 %shl
} }
Show All 35 Lines

test/MC/Mips/nacl-mask.s

# RUN: llvm-mc -filetype=obj -triple=mipsel-unknown-nacl %s \ # RUN: llvm-mc -filetype=obj -triple=mipsel-unknown-nacl %s \
# RUN: | llvm-objdump -triple mipsel -disassemble -no-show-raw-insn - \ # RUN: | llvm-objdump -disassemble -no-show-raw-insn - | FileCheck %s
# RUN: | FileCheck %s
# This test tests that address-masking sandboxing is added when given assembly # This test tests that address-masking sandboxing is added when given assembly
# input. # input.
# Test that address-masking sandboxing is added before indirect branches and # Test that address-masking sandboxing is added before indirect branches and
# returns. # returns.
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test/MC/Mips/sext_64_32.ll

; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 %s -o - | llvm-objdump -disassemble -triple mips64el - | FileCheck %s ; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 %s -o - | \
; RUN: llvm-objdump -disassemble - | FileCheck %s
; Sign extend from 32 to 64 was creating nonsense opcodes ; Sign extend from 32 to 64 was creating nonsense opcodes
; CHECK: sll ${{[a-z0-9]+}}, ${{[a-z0-9]+}}, 0 ; CHECK: sll ${{[a-z0-9]+}}, ${{[a-z0-9]+}}, 0
define i64 @foo(i32 %ival) nounwind readnone { define i64 @foo(i32 %ival) nounwind readnone {
entry: entry:
%conv = sext i32 %ival to i64 %conv = sext i32 %ival to i64
Show All 11 Lines

test/Object/Mips/feature.test

RUN: llvm-objdump -disassemble -triple mips64el -mattr +mips64r2 %p/../Inputs/dext-test.elf-mips64r2 \ RUN: llvm-objdump -disassemble -mattr +mips64r2 %p/../Inputs/dext-test.elf-mips64r2 \
RUN: | FileCheck %s RUN: | FileCheck %s
CHECK: Disassembly of section .text: CHECK: Disassembly of section .text:
CHECK: dext: CHECK: dext:
CHECK: 0: 08 00 e0 03 jr $ra CHECK: 0: 08 00 e0 03 jr $ra
CHECK: 4: 43 49 82 7c dext $2, $4, 5, 10 CHECK: 4: 43 49 82 7c dext $2, $4, 5, 10
CHECK: dextu: CHECK: dextu:
CHECK: 8: 08 00 e0 03 jr $ra CHECK: 8: 08 00 e0 03 jr $ra
CHECK: c: 83 28 82 7c dext $2, $4, 2, 6 CHECK: c: 83 28 82 7c dext $2, $4, 2, 6
CHECK: dextm: CHECK: dextm:
CHECK: 10: 08 00 e0 03 jr $ra CHECK: 10: 08 00 e0 03 jr $ra
CHECK: 14: 43 09 82 7c dext $2, $4, 5, 2 CHECK: 14: 43 09 82 7c dext $2, $4, 5, 2