[Clang][BuiltIn][avx512] Adding intrinsics for vpshufd instruction set

[delena]

include/clang/Basic/BuiltinsX86.def

2188 ↗

(On Diff #55167)

Where is the mask version of sad?

[m_zuckerman]

I delete the SAD instruction from this review and enter him into another review.

[m_zuckerman]

ping

[AsafBadouh]

lgtm

cfe/trunk/include/clang/Basic/BuiltinsX86.def

 TARGET_BUILTIN(__builtin_ia32_cmpsd_mask, "UcV2dV2dIiUcIi","","avx512f")
 TARGET_BUILTIN(__builtin_ia32_cmpss_mask, "UcV4fV4fIiUcIi","","avx512f")
 TARGET_BUILTIN(__builtin_ia32_movshdup512_mask, "V16fV16fV16fUs","","avx512f")
 TARGET_BUILTIN(__builtin_ia32_movsldup512_mask, "V16fV16fV16fUs","","avx512f")
 TARGET_BUILTIN(__builtin_ia32_movshdup128_mask, "V4fV4fV4fUc","","avx512vl")
 TARGET_BUILTIN(__builtin_ia32_movshdup256_mask, "V8fV8fV8fUc","","avx512vl")
 TARGET_BUILTIN(__builtin_ia32_movsldup128_mask, "V4fV4fV4fUc","","avx512vl")
 TARGET_BUILTIN(__builtin_ia32_movsldup256_mask, "V8fV8fV8fUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_pshufd512_mask, "V16iV16iCsV16iUc","","avx512f")
+TARGET_BUILTIN(__builtin_ia32_pshufd256_mask, "V8iV8iCsV8iUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_pshufd128_mask, "V4iV4iCsV4iUc","","avx512vl")
 
 #undef BUILTIN
 #undef TARGET_BUILTIN

cfe/trunk/lib/Headers/avx512fintrin.h

 _mm512_maskz_moveldup_ps (__mmask16 __U, __m512 __A)
 {
   return (__m512) __builtin_ia32_movsldup512_mask ((__v16sf) __A,
                (__v16sf)
                _mm512_setzero_ps (),
                (__mmask16) __U);
 }
 
+#define _mm512_shuffle_epi32( __A, __I) __extension__ ({ \
+__builtin_ia32_pshufd512_mask ((__v16si)( __A),\
+              ( __I),\
+              (__v16si) _mm512_undefined_epi32 (),\
+              (__mmask16) -1);\
+})
+
+#define _mm512_mask_shuffle_epi32( __W, __U, __A, __I) __extension__ ({ \
+__builtin_ia32_pshufd512_mask ((__v16si)( __A),\
+              ( __I),\
+              (__v16si)( __W),\
+              (__mmask16)( __U));\
+})
+
+#define _mm512_maskz_shuffle_epi32( __U, __A, __I) __extension__ ({ \
+__builtin_ia32_pshufd512_mask ((__v16si)( __A),\
+              ( __I),\
+              (__v16si) _mm512_setzero_si512 (),\
+              (__mmask16)( __U));\
+})
+
 #undef __DEFAULT_FN_ATTRS
 
 #endif // __AVX512FINTRIN_H

cfe/trunk/lib/Headers/avx512vlintrin.h

 _mm256_maskz_moveldup_ps (__mmask8 __U, __m256 __A)
 {
   return (__m256) __builtin_ia32_movsldup256_mask ((__v8sf) __A,
                (__v8sf)
                _mm256_setzero_ps (),
                (__mmask8) __U);
 }
 
+#define _mm256_mask_shuffle_epi32( __W, __U, __A, __I) __extension__({\
+__builtin_ia32_pshufd256_mask((__v8si) (__A), (__I),\
+              (__v8si) (__W), (__mmask8) __U);\
+})
+
+#define _mm256_maskz_shuffle_epi32( __U,  __A, __I) __extension__({\
+__builtin_ia32_pshufd256_mask((__v8si) (__A), (__I),\
+              (__v8si) _mm256_setzero_si256 (),\
+              (__mmask8) (__U));\
+})
+
+#define _mm_mask_shuffle_epi32( __W, __U, __A, __I) __extension__({\
+  __builtin_ia32_pshufd128_mask ((__v4si) (__A), (__I),\
+              (__v4si) (__W), (__mmask8) __U);\
+})
+
+#define _mm_maskz_shuffle_epi32( __U,  __A, __I) __extension__({\
+  __builtin_ia32_pshufd128_mask ((__v4si) (__A), (__I),\
+              (__v4si)\
+              _mm_setzero_si128 (),\
+              (__mmask8) (__U));\
+})
+
 #undef __DEFAULT_FN_ATTRS
 #undef __DEFAULT_FN_ATTRS_BOTH
 
 #endif /* __AVX512VLINTRIN_H */

cfe/trunk/test/CodeGen/avx512f-builtins.c

__m512 test_mm512_mask_moveldup_ps(__m512 __W, __mmask16 __U, __m512 __A) {
   return _mm512_mask_moveldup_ps(__W, __U, __A); 
 }
 
 __m512 test_mm512_maskz_moveldup_ps(__mmask16 __U, __m512 __A) {
   // CHECK-LABEL: @test_mm512_maskz_moveldup_ps
   // CHECK: @llvm.x86.avx512.mask.movsldup.512
   return _mm512_maskz_moveldup_ps(__U, __A); 
 }
+
+__m512i test_mm512_shuffle_epi32(__m512i __A) {
+  // CHECK-LABEL: @test_mm512_shuffle_epi32
+  // CHECK: @llvm.x86.avx512.mask.pshuf.d.512
+  return _mm512_shuffle_epi32(__A, 1); 
+}
+
+__m512i test_mm512_mask_shuffle_epi32(__m512i __W, __mmask16 __U, __m512i __A) {
+  // CHECK-LABEL: @test_mm512_mask_shuffle_epi32
+  // CHECK: @llvm.x86.avx512.mask.pshuf.d.512
+  return _mm512_mask_shuffle_epi32(__W, __U, __A, 1); 
+}
+
+__m512i test_mm512_maskz_shuffle_epi32(__mmask16 __U, __m512i __A) {
+  // CHECK-LABEL: @test_mm512_maskz_shuffle_epi32
+  // CHECK: @llvm.x86.avx512.mask.pshuf.d.512
+  return _mm512_maskz_shuffle_epi32(__U, __A, 1); 
+}
+

cfe/trunk/test/CodeGen/avx512vl-builtins.c

__m256 test_mm256_mask_moveldup_ps(__m256 __W, __mmask8 __U, __m256 __A) {
   return _mm256_mask_moveldup_ps(__W, __U, __A); 
 }
 
 __m256 test_mm256_maskz_moveldup_ps(__mmask8 __U, __m256 __A) {
   // CHECK-LABEL: @test_mm256_maskz_moveldup_ps
   // CHECK: @llvm.x86.avx512.mask.movsldup.256
   return _mm256_maskz_moveldup_ps(__U, __A); 
 }
+
+__m128i test_mm_mask_shuffle_epi32(__m128i __W, __mmask8 __U, __m128i __A) {
+  // CHECK-LABEL: @test_mm_mask_shuffle_epi32
+  // CHECK: @llvm.x86.avx512.mask.pshuf.d.128
+  return _mm_mask_shuffle_epi32(__W, __U, __A, 1); 
+}
+
+__m128i test_mm_maskz_shuffle_epi32(__mmask8 __U, __m128i __A) {
+  // CHECK-LABEL: @test_mm_maskz_shuffle_epi32
+  // CHECK: @llvm.x86.avx512.mask.pshuf.d.128
+  return _mm_maskz_shuffle_epi32(__U, __A, 2); 
+}
+
+__m256i test_mm256_mask_shuffle_epi32(__m256i __W, __mmask8 __U, __m256i __A) {
+  // CHECK-LABEL: @test_mm256_mask_shuffle_epi32
+  // CHECK: @llvm.x86.avx512.mask.pshuf.d.256
+  return _mm256_mask_shuffle_epi32(__W, __U, __A, 2); 
+}
+
+__m256i test_mm256_maskz_shuffle_epi32(__mmask8 __U, __m256i __A) {
+  // CHECK-LABEL: @test_mm256_maskz_shuffle_epi32
+  // CHECK: @llvm.x86.avx512.mask.pshuf.d.256
+  return _mm256_maskz_shuffle_epi32(__U, __A, 2); 
+}
+