Simplify AHL handling

[• rafael]

Summary

This simplifies a few things

• Read the value as early as possible, instead of passing a pointer to the location.
• Print the warning for missing pair close to where we find out it is missing.

This is not a complete nop for the case where there is no matching relocation. We now read the high part of the addend. Note that we were already doing that when creating a got entry, but not when computing relocations.

According to the spec (4-17 at ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf) each high relocation *must* have a matching lo, so this is hopefully OK.

[• rafael]

Never mind, I was able to make this a nop.

ELF/InputSection.h

public:
   InputSectionBase<ELFT> *getRelocTarget(const Elf_Rela &Rel) const;
 
   template <class RelTy>
   void relocate(uint8_t *Buf, uint8_t *BufEnd,
                 llvm::iterator_range<const RelTy *> Rels);
 
 private:
   template <class RelTy>
-  uint8_t *findMipsPairedReloc(uint8_t *Buf, const RelTy *Rel,
+  int16_t findMipsPairedAddend(uint8_t *Buf, SymbolBody &Sym, const RelTy *Rel,
                                const RelTy *End);
 };
 
 template <class ELFT>
 InputSectionBase<ELFT> *
     InputSectionBase<ELFT>::Discarded = (InputSectionBase<ELFT> *)-1ULL;
 
 // Usually sections are copied to the output as atomic chunks of data,

ELF/InputSection.cpp

case R_MIPS_PCHI16:
     return R_MIPS_PCLO16;
   case R_MICROMIPS_HI16:
     return R_MICROMIPS_LO16;
   default:
     return R_MIPS_NONE;
   }
 }
 
+template <endianness E> static int16_t readSignedLo16(uint8_t *Loc) {
+  return read32<E>(Loc) & 0xffff;
+}
+
 template <class ELFT>
 template <class RelTy>
-uint8_t *InputSectionBase<ELFT>::findMipsPairedReloc(uint8_t *Buf,
+int16_t InputSectionBase<ELFT>::findMipsPairedAddend(uint8_t *Buf,
+                                                     SymbolBody &Sym,
                                                      const RelTy *Rel,
                                                      const RelTy *End) {
   uint32_t SymIndex = Rel->getSymbol(Config->Mips64EL);
-  SymbolBody &Sym = File->getSymbolBody(SymIndex).repl();
   uint32_t Type = getMipsPairType(Rel, Sym);
 
   // Some MIPS relocations use addend calculated from addend of the relocation
   // itself and addend of paired relocation. ABI requires to compute such
   // combined addend in case of REL relocation record format only.
   // See p. 4-17 at ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
   if (RelTy::IsRela || Type == R_MIPS_NONE)
-    return nullptr;
+    return 0;
 
   for (const RelTy *RI = Rel; RI != End; ++RI) {
     if (RI->getType(Config->Mips64EL) != Type)
       continue;
     if (RI->getSymbol(Config->Mips64EL) != SymIndex)
       continue;
     uintX_t Offset = getOffset(RI->r_offset);
     if (Offset == (uintX_t)-1)
-      return nullptr;
-    return Buf + Offset;
+      break;
+    return readSignedLo16<ELFT::TargetEndianness>(Buf + Offset);
   }
-  return nullptr;
+  unsigned OldType = Rel->getType(Config->Mips64EL);
+  StringRef OldName = getELFRelocationTypeName(Config->EMachine, OldType);
+  StringRef NewName = getELFRelocationTypeName(Config->EMachine, Type);
+  warning("can't find matching " + NewName + " relocation for " + OldName);
+  return 0;
 }
 
 template <class ELFT, class uintX_t>
 static uintX_t adjustMipsSymVA(uint32_t Type, const elf::ObjectFile<ELFT> &File,
                                const SymbolBody &Body, uintX_t AddrLoc,
                                uintX_t SymVA) {
   if (Type == R_MIPS_HI16 && &Body == Config->MipsGpDisp)
     return getMipsGpAddr<ELFT>() - AddrLoc;
   if (Type == R_MIPS_LO16 && &Body == Config->MipsGpDisp)
     return getMipsGpAddr<ELFT>() - AddrLoc + 4;
   if (&Body == Config->MipsLocalGp)
     return getMipsGpAddr<ELFT>();
   if (Body.isLocal() && (Type == R_MIPS_GPREL16 || Type == R_MIPS_GPREL32))
     // We need to adjust SymVA value in case of R_MIPS_GPREL16/32
     // relocations because they use the following expression to calculate
     // the relocation's result for local symbol: S + A + GP0 - G.
     return SymVA + File.getMipsGp0();
   return SymVA;
 }
 
 template <class ELFT, class uintX_t>
 static uintX_t getMipsGotVA(const SymbolBody &Body, uintX_t SymVA,
-                            uint8_t *BufLoc, uint8_t *PairedLoc) {
+                            uint8_t *BufLoc, int16_t PairedAddend) {
   if (Body.isLocal()) {
     // If relocation against MIPS local symbol requires GOT entry, this entry
     // should be initialized by 'page address'. This address is high 16-bits
     // of sum the symbol's value and the addend. The addend in that case is
     // calculated using addends from R_MIPS_GOT16 and paired R_MIPS_LO16
     // relocations.
     const endianness E = ELFT::TargetEndianness;
-    uint64_t AHL = read32<E>(BufLoc) << 16;
-    if (PairedLoc)
-      AHL += SignExtend64<16>(read32<E>(PairedLoc));
+    uint64_t AHL = (read32<E>(BufLoc) << 16) + PairedAddend;
     return Out<ELFT>::Got->getMipsLocalPageAddr(SymVA + AHL);
   }
   if (!Body.isPreemptible())
     // For non-local symbols GOT entries should contain their full
     // addresses. But if such symbol cannot be preempted, we do not
     // have to put them into the "global" part of GOT and use dynamic
     // linker to determine their actual addresses. That is why we
     // create GOT entries for them in the "local" part of GOT.
for (size_t I = 0; I < Num; ++I) {
     if (Target->isTlsGlobalDynamicRel(Type) &&
         !Target->canRelaxTls(Type, &Body)) {
       Target->relocateOne(BufLoc, BufEnd, Type, AddrLoc,
                           Out<ELFT>::Got->getGlobalDynAddr(Body) + A);
       continue;
     }
 
     uintX_t SymVA = Body.getVA<ELFT>(A);
-    uint8_t *PairedLoc = nullptr;
+    int16_t PairedAddend = 0;
     if (Config->EMachine == EM_MIPS)
-      PairedLoc = findMipsPairedReloc(Buf, &RI, Rels.end());
+      PairedAddend = findMipsPairedAddend(Buf, Body, &RI, Rels.end());
 
     if (Target->needsPlt(Type, Body)) {
       SymVA = Body.getPltVA<ELFT>() + A;
     } else if (Target->needsGot(Type, Body)) {
       if (Config->EMachine == EM_MIPS)
-        SymVA = getMipsGotVA<ELFT>(Body, SymVA, BufLoc, PairedLoc) + A;
+        SymVA = getMipsGotVA<ELFT>(Body, SymVA, BufLoc, PairedAddend) + A;
       else
         SymVA = Body.getGotVA<ELFT>() + A;
       if (Body.IsTls)
         Type = Target->getTlsGotRel(Type);
     } else if (Target->isSizeRel(Type) && Body.isPreemptible()) {
       // A SIZE relocation is supposed to set a symbol size, but if a symbol
       // can be preempted, the size at runtime may be different than link time.
       // If that's the case, we leave the field alone rather than filling it
       // with a possibly incorrect value.
       continue;
     } else if (Config->EMachine == EM_MIPS) {
       SymVA = adjustMipsSymVA<ELFT>(Type, *File, Body, AddrLoc, SymVA) + A;
     } else if (!Target->needsCopyRel<ELFT>(Type, Body) &&
                Body.isPreemptible()) {
       continue;
     }
     uintX_t Size = Body.getSize<ELFT>();
     Target->relocateOne(BufLoc, BufEnd, Type, AddrLoc, SymVA, Size + A,
-                        PairedLoc);
+                        PairedAddend);
   }
 }
 
 template <class ELFT> void InputSection<ELFT>::writeTo(uint8_t *Buf) {
   if (this->Header->sh_type == SHT_NOBITS)
     return;
   // Copy section contents from source object file to output file.
   ArrayRef<uint8_t> Data = this->getSectionData();

ELF/Target.h

public:
   virtual bool needsGot(uint32_t Type, SymbolBody &S) const;
   virtual bool refersToGotEntry(uint32_t Type) const;
 
   enum PltNeed { Plt_No, Plt_Explicit, Plt_Implicit };
   PltNeed needsPlt(uint32_t Type, const SymbolBody &S) const;
 
   virtual void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                            uint64_t P, uint64_t SA, uint64_t ZA = 0,
-                           uint8_t *PairedLoc = nullptr) const = 0;
+                           int16_t PairedAddend = 0) const = 0;
   virtual bool isGotRelative(uint32_t Type) const;
   bool canRelaxTls(uint32_t Type, const SymbolBody *S) const;
   template <class ELFT>
   bool needsCopyRel(uint32_t Type, const SymbolBody &S) const;
   size_t relaxTls(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
                   uint64_t SA, const SymbolBody &S) const;
   virtual ~TargetInfo();
 

ELF/Target.cpp

void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
                 int32_t Index, unsigned RelOff) const override;
   bool isRelRelative(uint32_t Type) const override;
   bool needsCopyRelImpl(uint32_t Type) const override;
   bool needsDynRelative(uint32_t Type) const override;
   bool needsGot(uint32_t Type, SymbolBody &S) const override;
   bool needsPltImpl(uint32_t Type) const override;
   void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
                    uint64_t SA, uint64_t ZA = 0,
-                   uint8_t *PairedLoc = nullptr) const override;
+                   int16_t PairedAddend = 0) const override;
 
   size_t relaxTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                         uint64_t P, uint64_t SA) const override;
   size_t relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                         uint64_t P, uint64_t SA) const override;
   size_t relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                         uint64_t P, uint64_t SA) const override;
   size_t relaxTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
public:
   void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
                 int32_t Index, unsigned RelOff) const override;
   bool needsCopyRelImpl(uint32_t Type) const override;
   bool needsGot(uint32_t Type, SymbolBody &S) const override;
   bool refersToGotEntry(uint32_t Type) const override;
   bool needsPltImpl(uint32_t Type) const override;
   void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
                    uint64_t SA, uint64_t ZA = 0,
-                   uint8_t *PairedLoc = nullptr) const override;
+                   int16_t PairedAddend = 0) const override;
   bool isRelRelative(uint32_t Type) const override;
   bool isSizeRel(uint32_t Type) const override;
 
   size_t relaxTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                         uint64_t P, uint64_t SA) const override;
   size_t relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                         uint64_t P, uint64_t SA) const override;
   size_t relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                         uint64_t P, uint64_t SA) const override;
   size_t relaxTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                         uint64_t P, uint64_t SA) const override;
 };
 
 class PPCTargetInfo final : public TargetInfo {
 public:
   PPCTargetInfo();
   void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
-                   uint64_t SA, uint64_t ZA = 0,
-                   uint8_t *PairedLoc = nullptr) const override;
+                   uint64_t SA, uint64_t ZA,
+                   int16_t PairedAddend) const override;
   bool isRelRelative(uint32_t Type) const override;
 };
 
 class PPC64TargetInfo final : public TargetInfo {
 public:
   PPC64TargetInfo();
   void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
                 int32_t Index, unsigned RelOff) const override;
   bool needsGot(uint32_t Type, SymbolBody &S) const override;
   bool needsPltImpl(uint32_t Type) const override;
   void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
-                   uint64_t SA, uint64_t ZA = 0,
-                   uint8_t *PairedLoc = nullptr) const override;
+                   uint64_t SA, uint64_t ZA,
+                   int16_t PairedAddend) const override;
   bool isRelRelative(uint32_t Type) const override;
 };
 
 class AArch64TargetInfo final : public TargetInfo {
 public:
   AArch64TargetInfo();
   uint32_t getDynRel(uint32_t Type) const override;
   bool isTlsGlobalDynamicRel(uint32_t Type) const override;
   bool isTlsInitialExecRel(uint32_t Type) const override;
   void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override;
   void writePltZero(uint8_t *Buf) const override;
   void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
                 int32_t Index, unsigned RelOff) const override;
   uint32_t getTlsGotRel(uint32_t Type) const override;
   bool isRelRelative(uint32_t Type) const override;
   bool needsCopyRelImpl(uint32_t Type) const override;
   bool needsGot(uint32_t Type, SymbolBody &S) const override;
   bool needsPltImpl(uint32_t Type) const override;
   void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
                    uint64_t SA, uint64_t ZA = 0,
-                   uint8_t *PairedLoc = nullptr) const override;
-
+                   int16_t PairedAddend = 0) const override;
   size_t relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                         uint64_t P, uint64_t SA) const override;
   size_t relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                         uint64_t P, uint64_t SA) const override;
 
 private:
   static const uint64_t TcbSize = 16;
 };
 
 class AMDGPUTargetInfo final : public TargetInfo {
 public:
   AMDGPUTargetInfo() {}
   void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
-                   uint64_t SA, uint64_t ZA = 0,
-                   uint8_t *PairedLoc = nullptr) const override;
+                   uint64_t SA, uint64_t ZA,
+                   int16_t PairedAddend) const override;
 };
 
 template <class ELFT> class MipsTargetInfo final : public TargetInfo {
 public:
   MipsTargetInfo();
   uint32_t getDynRel(uint32_t Type) const override;
   void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override;
   void writePltZero(uint8_t *Buf) const override;
   void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
                 int32_t Index, unsigned RelOff) const override;
   void writeGotHeader(uint8_t *Buf) const override;
   bool needsCopyRelImpl(uint32_t Type) const override;
   bool needsGot(uint32_t Type, SymbolBody &S) const override;
   bool needsPltImpl(uint32_t Type) const override;
   void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
-                   uint64_t S, uint64_t ZA = 0,
-                   uint8_t *PairedLoc = nullptr) const override;
+                   uint64_t SA, uint64_t ZA,
+                   int16_t PairedAddend) const override;
   bool isHintRel(uint32_t Type) const override;
   bool isRelRelative(uint32_t Type) const override;
   bool refersToGotEntry(uint32_t Type) const override;
 };
 } // anonymous namespace
 
 TargetInfo *createTarget() {
   switch (Config->EMachine) {

 }
 
 bool X86TargetInfo::refersToGotEntry(uint32_t Type) const {
   return Type == R_386_GOT32;
 }
 
 void X86TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                                 uint64_t P, uint64_t SA, uint64_t ZA,
-                                uint8_t *PairedLoc) const {
+                                int16_t PairedAddend) const {
   switch (Type) {
   case R_386_32:
     add32le(Loc, SA);
     break;
   case R_386_GOT32: {
     uint64_t V = SA - Out<ELF32LE>::Got->getVA() -
                  Out<ELF32LE>::Got->getNumEntries() * 4;
     checkInt<32>(V, Type);
size_t X86_64TargetInfo::relaxTlsLdToLe(uint8_t *Loc, uint8_t *BufEnd,
   };
   memcpy(Loc - 3, Inst, sizeof(Inst));
   // The next relocation should be against __tls_get_addr, so skip it
   return 1;
 }
 
 void X86_64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                                    uint64_t P, uint64_t SA, uint64_t ZA,
-                                   uint8_t *PairedLoc) const {
+                                   int16_t PairedAddend) const {
   switch (Type) {
   case R_X86_64_32:
     checkUInt<32>(SA, Type);
     write32le(Loc, SA);
     break;
   case R_X86_64_32S:
     checkInt<32>(SA, Type);
     write32le(Loc, SA);

 static uint16_t applyPPCHighest(uint64_t V) { return V >> 48; }
 static uint16_t applyPPCHighesta(uint64_t V) { return (V + 0x8000) >> 48; }
 
 PPCTargetInfo::PPCTargetInfo() {}
 bool PPCTargetInfo::isRelRelative(uint32_t Type) const { return false; }
 
 void PPCTargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                                 uint64_t P, uint64_t SA, uint64_t ZA,
-                                uint8_t *PairedLoc) const {
+                                int16_t PairedAddend) const {
   switch (Type) {
   case R_PPC_ADDR16_HA:
     write16be(Loc, applyPPCHa(SA));
     break;
   case R_PPC_ADDR16_LO:
     write16be(Loc, applyPPCLo(SA));
     break;
   default:
bool PPC64TargetInfo::isRelRelative(uint32_t Type) const {
   case R_PPC64_ADDR64:
   case R_PPC64_TOC:
     return false;
   }
 }
 
 void PPC64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                                   uint64_t P, uint64_t SA, uint64_t ZA,
-                                  uint8_t *PairedLoc) const {
+                                  int16_t PairedAddend) const {
   uint64_t TB = getPPC64TocBase();
 
   // For a TOC-relative relocation, adjust the addend and proceed in terms of
   // the corresponding ADDR16 relocation type.
   switch (Type) {
   case R_PPC64_TOC16:       Type = R_PPC64_ADDR16;       SA -= TB; break;
   case R_PPC64_TOC16_DS:    Type = R_PPC64_ADDR16_DS;    SA -= TB; break;
   case R_PPC64_TOC16_HA:    Type = R_PPC64_ADDR16_HA;    SA -= TB; break;

 // as (Expr & ~0xFFF). (This applies even if the machine page size
 // supported by the platform has a different value.)
 static uint64_t getAArch64Page(uint64_t Expr) {
   return Expr & (~static_cast<uint64_t>(0xFFF));
 }
 
 void AArch64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd,
                                     uint32_t Type, uint64_t P, uint64_t SA,
-                                    uint64_t ZA, uint8_t *PairedLoc) const {
+                                    uint64_t ZA, int16_t PairedAddend) const {
   switch (Type) {
   case R_AARCH64_ABS16:
     checkIntUInt<16>(SA, Type);
     write16le(Loc, SA);
     break;
   case R_AARCH64_ABS32:
     checkIntUInt<32>(SA, Type);
     write32le(Loc, SA);

 }
 
 // Implementing relocations for AMDGPU is low priority since most
 // programs don't use relocations now. Thus, this function is not
 // actually called (relocateOne is called for each relocation).
 // That's why the AMDGPU port works without implementing this function.
 void AMDGPUTargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                                    uint64_t P, uint64_t SA, uint64_t ZA,
-                                   uint8_t *PairedLoc) const {
+                                   int16_t PairedAddend) const {
   llvm_unreachable("not implemented");
 }
 
 template <class ELFT> MipsTargetInfo<ELFT>::MipsTargetInfo() {
   GotHeaderEntriesNum = 2;
   GotPltHeaderEntriesNum = 2;
   PageSize = 65536;
   PltEntrySize = 16;
static void writeMipsLo16(uint8_t *Loc, uint64_t V) {
   write32<E>(Loc, (Instr & 0xffff0000) | (V & 0xffff));
 }
 
 template <endianness E> static int16_t readSignedLo16(uint8_t *Loc) {
   return SignExtend32<16>(read32<E>(Loc) & 0xffff);
 }
 
 template <endianness E>
-static int64_t readMipsAHL(uint8_t *HiLoc, uint8_t *LoLoc) {
-  return ((read32<E>(HiLoc) & 0xffff) << 16) + readSignedLo16<E>(LoLoc);
+static int64_t readMipsAHL(uint8_t *HiLoc, int16_t PairedAddend) {
+  return ((read32<E>(HiLoc) & 0xffff) << 16) + PairedAddend;
 }
 
 template <class ELFT>
 void MipsTargetInfo<ELFT>::writePltZero(uint8_t *Buf) const {
   const endianness E = ELFT::TargetEndianness;
   write32<E>(Buf, 0x3c1c0000);      // lui   $28, %hi(&GOTPLT[0])
   write32<E>(Buf + 4, 0x8f990000);  // lw    $25, %lo(&GOTPLT[0])($28)
   write32<E>(Buf + 8, 0x279c0000);  // addiu $28, $28, %lo(&GOTPLT[0])

 template <class ELFT>
 bool MipsTargetInfo<ELFT>::needsPltImpl(uint32_t Type) const {
   return Type == R_MIPS_26;
 }
 
 template <class ELFT>
 void MipsTargetInfo<ELFT>::relocateOne(uint8_t *Loc, uint8_t *BufEnd,
                                        uint32_t Type, uint64_t P, uint64_t S,
-                                       uint64_t ZA, uint8_t *PairedLoc) const {
+                                       uint64_t ZA,
+                                       int16_t PairedAddend) const {
   const endianness E = ELFT::TargetEndianness;
   // Thread pointer and DRP offsets from the start of TLS data area.
   // https://www.linux-mips.org/wiki/NPTL
   const uint32_t TPOffset = 0x7000;
   const uint32_t DTPOffset = 0x8000;
   switch (Type) {
   case R_MIPS_32:
     add32<E>(Loc, S);
case R_MIPS_GPREL16: {
     checkInt<16>(V, Type);
     writeMipsLo16<E>(Loc, V);
     break;
   }
   case R_MIPS_GPREL32:
     write32<E>(Loc, S + int32_t(read32<E>(Loc)) - getMipsGpAddr<ELFT>());
     break;
   case R_MIPS_HI16:
-    if (PairedLoc)
-      writeMipsHi16<E>(Loc, S + readMipsAHL<E>(Loc, PairedLoc));
-    else {
-      warning("can't find matching R_MIPS_LO16 relocation for R_MIPS_HI16");
-      writeMipsHi16<E>(Loc, S);
-    }
+    writeMipsHi16<E>(Loc, S + readMipsAHL<E>(Loc, PairedAddend));
     break;
   case R_MIPS_JALR:
     // Ignore this optimization relocation for now
     break;
   case R_MIPS_LO16:
     writeMipsLo16<E>(Loc, S + readSignedLo16<E>(Loc));
     break;
   case R_MIPS_PC16:
     applyMipsPcReloc<E, 16, 2>(Loc, Type, P, S);
     break;
   case R_MIPS_PC19_S2:
     applyMipsPcReloc<E, 19, 2>(Loc, Type, P, S);
     break;
   case R_MIPS_PC21_S2:
     applyMipsPcReloc<E, 21, 2>(Loc, Type, P, S);
     break;
   case R_MIPS_PC26_S2:
     applyMipsPcReloc<E, 26, 2>(Loc, Type, P, S);
     break;
   case R_MIPS_PC32:
     applyMipsPcReloc<E, 32, 0>(Loc, Type, P, S);
     break;
   case R_MIPS_PCHI16:
-    if (PairedLoc)
-      writeMipsHi16<E>(Loc, S + readMipsAHL<E>(Loc, PairedLoc) - P);
-    else {
-      warning("can't find matching R_MIPS_PCLO16 relocation for R_MIPS_PCHI16");
-      writeMipsHi16<E>(Loc, S - P);
-    }
+    writeMipsHi16<E>(Loc, S + readMipsAHL<E>(Loc, PairedAddend) - P);
     break;
   case R_MIPS_PCLO16:
     writeMipsLo16<E>(Loc, S + readSignedLo16<E>(Loc) - P);
     break;
   case R_MIPS_TLS_DTPREL_HI16:
     writeMipsHi16<E>(Loc, S - DTPOffset + readSignedLo16<E>(Loc));
     break;
   case R_MIPS_TLS_DTPREL_LO16:

test/ELF/mips-hilo-hi-only.s

__start:
   addi   $t0,$t0,%lo(_label)
 _label:
   nop
 
 # WARN: can't find matching R_MIPS_LO16 relocation for R_MIPS_HI16
 
 # CHECK:      Disassembly of section .text:
 # CHECK-NEXT: __start:
-# CHECK-NEXT:  20000:   3c 08 00 02   lui    $8, 2
-#                                                ^-- %hi(__start) w/o addend
+# CHECK-NEXT:  20000:   3c 08 00 03   lui    $8, 3
+#                                                ^-- %hi(__start+0x10000)
 # CHECK-NEXT   20004:   21 08 00 08   addi   $8, $8, 8
 #                                                    ^-- %lo(_label)
 
 # CHECK: SYMBOL TABLE:
 # CHECK: 00020008    .text   00000000 _label
 # CHECK: 00020000    .text   00000000 __start