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Differential D15786

[X86][Avx512] change broadcast to use maskable pattern
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Authored by AsafBadouh on Dec 27 2015, 3:10 AM.

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Reviewers
delena
igorb
m_zuckerman
Commits
rGb0d91fa42a74: [X86][AVX512] change broadcast to use maskable pattern
rL256469: [X86][AVX512] change broadcast to use maskable pattern

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rL LLVM

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AsafBadouh updated this revision to Diff 43656.Dec 27 2015, 3:10 AM
AsafBadouh retitled this revision from to [X86][Avx512] change broadcast to use maskable pattern.
AsafBadouh updated this object.
AsafBadouh added reviewers: igorb, delena, m_zuckerman.
AsafBadouh set the repository for this revision to rL LLVM.
AsafBadouh added a subscriber: llvm-commits.
delena accepted this revision.Dec 27 2015, 3:41 AM
delena edited edge metadata.

LGTM

This revision is now accepted and ready to land.Dec 27 2015, 3:41 AM
Closed by commit rL256469: [X86][AVX512] change broadcast to use maskable pattern (authored by abadouh). · Explain WhyDec 27 2015, 4:18 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

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llvm/
trunk/
lib/
Target/
X86/
23 lines

Diff 43661

llvm/trunk/lib/Target/X86/X86InstrAVX512.td

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 994 Lines • ▼ Show 20 Linesdefm VPBROADCASTW : avx512_int_broadcast_rm_vl<0x79, "vpbroadcastw",
avx512vl_i16_info, HasBWI>; avx512vl_i16_info, HasBWI>;
defm VPBROADCASTD : avx512_int_broadcast_rm_vl<0x58, "vpbroadcastd", defm VPBROADCASTD : avx512_int_broadcast_rm_vl<0x58, "vpbroadcastd",
avx512vl_i32_info, HasAVX512>; avx512vl_i32_info, HasAVX512>;
defm VPBROADCASTQ : avx512_int_broadcast_rm_vl<0x59, "vpbroadcastq", defm VPBROADCASTQ : avx512_int_broadcast_rm_vl<0x59, "vpbroadcastq",
avx512vl_i64_info, HasAVX512>, VEX_W; avx512vl_i64_info, HasAVX512>, VEX_W;
multiclass avx512_subvec_broadcast_rm<bits<8> opc, string OpcodeStr, multiclass avx512_subvec_broadcast_rm<bits<8> opc, string OpcodeStr,
X86VectorVTInfo _Dst, X86VectorVTInfo _Src> { X86VectorVTInfo _Dst, X86VectorVTInfo _Src> {
let mayLoad = 1 in { let mayLoad = 1 in
def rm : AVX5128I<opc, MRMSrcMem, (outs _Dst.RC:$dst), (ins _Src.MemOp:$src), defm rm : AVX512_maskable<opc, MRMSrcMem, _Dst, (outs _Dst.RC:$dst),
!strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"), (ins _Src.MemOp:$src), OpcodeStr, "$src", "$src",
[(set _Dst.RC:$dst,
(_Dst.VT (X86SubVBroadcast (_Dst.VT (X86SubVBroadcast
(_Src.VT (bitconvert (_Src.LdFrag addr:$src))))))]>, EVEX; (_Src.VT (bitconvert (_Src.LdFrag addr:$src)))))>,
def rmk : AVX5128I<opc, MRMSrcMem, (outs _Dst.RC:$dst), (ins _Dst.KRCWM:$mask, AVX5128IBase, EVEX;
_Src.MemOp:$src),
!strconcat(OpcodeStr,
"\t{$src, ${dst} {${mask}}|${dst} {${mask}}, $src}"),
[]>, EVEX, EVEX_K;
def rmkz : AVX5128I<opc, MRMSrcMem, (outs _Dst.RC:$dst), (ins _Dst.KRCWM:$mask,
_Src.MemOp:$src),
!strconcat(OpcodeStr,
"\t{$src, ${dst} {${mask}} {z}|${dst} {${mask}} {z}, $src}"),
[]>, EVEX, EVEX_KZ;
}
} }
defm VBROADCASTI32X4 : avx512_subvec_broadcast_rm<0x5a, "vbroadcasti32x4", defm VBROADCASTI32X4 : avx512_subvec_broadcast_rm<0x5a, "vbroadcasti32x4",
v16i32_info, v4i32x_info>, v16i32_info, v4i32x_info>,
EVEX_V512, EVEX_CD8<32, CD8VT4>; EVEX_V512, EVEX_CD8<32, CD8VT4>;
defm VBROADCASTF32X4 : avx512_subvec_broadcast_rm<0x1a, "vbroadcastf32x4", defm VBROADCASTF32X4 : avx512_subvec_broadcast_rm<0x1a, "vbroadcastf32x4",
v16f32_info, v4f32x_info>, v16f32_info, v4f32x_info>,
EVEX_V512, EVEX_CD8<32, CD8VT4>; EVEX_V512, EVEX_CD8<32, CD8VT4>;
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