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Differential D14635

[LLDB][MIPS] Fix lldbplatformutil.py Failure
ClosedPublic

Authored by nitesh.jain on Nov 12 2015, 10:22 PM.

Details

Reviewers
ovyalov
clayborg
jaydeep
Summary

This patch check whether first register is readable.

Diff Detail

Repository
rL LLVM

Event Timeline

nitesh.jain updated this revision to Diff 40110.Nov 12 2015, 10:22 PM
nitesh.jain retitled this revision from to [LLDB][MIPS] Fix lldbplatformutil.py Failure.
nitesh.jain updated this object.
nitesh.jain added reviewers: jaydeep, clayborg, ovyalov.
nitesh.jain set the repository for this revision to rL LLVM.
nitesh.jain added subscribers: bhushan, slthakur, mohit.bhakkad, lldb-commits.
ovyalov accepted this revision.Nov 13 2015, 9:31 AM
ovyalov edited edge metadata.
This revision is now accepted and ready to land.Nov 13 2015, 9:31 AM
clayborg accepted this revision.Nov 13 2015, 10:05 AM
clayborg edited edge metadata.
slthakur closed this revision.Nov 19 2015, 3:06 AM

Committed in r253555 on behalf of @nitesh.jain

Revision Contents

PathSize
packages/
Python/
lldbsuite/
test/
11 lines

Diff 40110

packages/Python/lldbsuite/test/lldbplatformutil.py

""" This module contains functions used by the test cases to hide the """ This module contains functions used by the test cases to hide the
architecture and/or the platform dependent nature of the tests. """ architecture and/or the platform dependent nature of the tests. """
import re
def check_first_register_readable(test_case): def check_first_register_readable(test_case):
if test_case.getArchitecture() in ['x86_64', 'i386']: arch = test_case.getArchitecture()
if arch in ['x86_64', 'i386']:
test_case.expect("register read eax", substrs = ['eax = 0x']) test_case.expect("register read eax", substrs = ['eax = 0x'])
elif test_case.getArchitecture() in ['arm']: elif arch in ['arm']:
test_case.expect("register read r0", substrs = ['r0 = 0x']) test_case.expect("register read r0", substrs = ['r0 = 0x'])
elif test_case.getArchitecture() in ['aarch64']: elif arch in ['aarch64']:
test_case.expect("register read x0", substrs = ['x0 = 0x']) test_case.expect("register read x0", substrs = ['x0 = 0x'])
elif re.match("mips",arch):
test_case.expect("register read zero", substrs = ['zero = 0x'])
else: else:
# TODO: Add check for other architectures # TODO: Add check for other architectures
test_case.fail("Unsupported architecture for test case (arch: %s)" % test_case.getArchitecture()) test_case.fail("Unsupported architecture for test case (arch: %s)" % test_case.getArchitecture())