[mips][mips16] Re-work the inline assembly stubs to work with IAS. NFC.

[dsanders]

Summary

Previously, we were inserting an InlineAsm statement for each line of the
inline assembly. This works for GAS but it triggers prologue/epilogue
emission when IAS is in use. This caused:

.set noreorder
.cpload $25

to be emitted as:

.set push
.set reorder
.set noreorder
.set pop
.set push
.set reorder
.cpload $25
.set pop

which led to assembler errors and caused the test to fail.

The whitespace-after-comma changes included in this patch are necessary to
match the output when IAS is in use.

[vkalintiris]

LGTM.

lib/Target/Mips/Mips16HardFloat.cpp

44–52 ↗

(On Diff #37110)

clang-format reformats this bit.

[dsanders]

Thanks

lib/Target/Mips/Mips16HardFloat.cpp

44–52 ↗

(On Diff #37110)

Fixed in the commit

llvm/trunk/lib/Target/Mips/Mips16HardFloat.cpp

public:
     }
 
     bool runOnModule(Module &M) override;
 
   protected:
     const MipsTargetMachine &TM;
   };
 
-  class InlineAsmHelper {
-    LLVMContext &C;
-    BasicBlock *BB;
-  public:
-    InlineAsmHelper(LLVMContext &C_, BasicBlock *BB_) :
-      C(C_), BB(BB_) {
-      }
-
-    void Out(StringRef AsmString) {
-      std::vector<llvm::Type *> AsmArgTypes;
-      std::vector<llvm::Value*> AsmArgs;
+  static void EmitInlineAsm(LLVMContext &C, BasicBlock *BB, StringRef AsmText) {
+    std::vector<llvm::Value *> AsmArgs;
 
-      llvm::FunctionType *AsmFTy = llvm::FunctionType::get(Type::getVoidTy(C),
-                                                           AsmArgTypes, false);
-      llvm::InlineAsm *IA = llvm::InlineAsm::get(AsmFTy, AsmString, "", true,
-                                                 /* IsAlignStack */ false,
-                                                 llvm::InlineAsm::AD_ATT);
-      CallInst::Create(IA, AsmArgs, "", BB);
-    }
-  };
+    llvm::FunctionType *AsmFTy =
+        llvm::FunctionType::get(Type::getVoidTy(C), AsmArgTypes, false);
+    llvm::InlineAsm *IA =
+        llvm::InlineAsm::get(AsmFTy, AsmText, "", true,
+                             /* IsAlignStack */ false, llvm::InlineAsm::AD_ATT);
 
   char Mips16HardFloat::ID = 0;
 }
 
 //
 // Return types that matter for hard float are:
 // float, double, complex float, and complex double
 //

 static bool needsFPHelperFromSig(Function &F) {
   return needsFPStubFromParams(F) || needsFPReturnHelper(F);
 }
 
 //
 // We swap between FP and Integer registers to allow Mips16 and Mips32 to
 // interoperate
 //
-static void swapFPIntParams(FPParamVariant PV, Module *M, InlineAsmHelper &IAH,
-                            bool LE, bool ToFP) {
-  //LLVMContext &Context = M->getContext();
-  std::string MI = ToFP? "mtc1 ": "mfc1 ";
+static std::string swapFPIntParams(FPParamVariant PV, Module *M, bool LE,
+                                   bool ToFP) {
+  std::string MI = ToFP ? "mtc1 ": "mfc1 ";
+  std::string AsmText;
+
   switch (PV) {
   case FSig:
-    IAH.Out(MI + "$$4,$$f12");
+    AsmText += MI + "$$4, $$f12\n";
     break;
+
   case FFSig:
-    IAH.Out(MI +"$$4,$$f12");
-    IAH.Out(MI + "$$5,$$f14");
+    AsmText += MI + "$$4, $$f12\n";
+    AsmText += MI + "$$5, $$f14\n";
     break;
+
   case FDSig:
-    IAH.Out(MI + "$$4,$$f12");
+    AsmText += MI + "$$4, $$f12\n";
     if (LE) {
-      IAH.Out(MI + "$$6,$$f14");
-      IAH.Out(MI + "$$7,$$f15");
+      AsmText += MI + "$$6, $$f14\n";
+      AsmText += MI + "$$7, $$f15\n";
     } else {
-      IAH.Out(MI + "$$7,$$f14");
-      IAH.Out(MI + "$$6,$$f15");
+      AsmText += MI + "$$7, $$f14\n";
+      AsmText += MI + "$$6, $$f15\n";
     }
     break;
+
   case DSig:
     if (LE) {
-      IAH.Out(MI + "$$4,$$f12");
-      IAH.Out(MI + "$$5,$$f13");
+      AsmText += MI + "$$4, $$f12\n";
+      AsmText += MI + "$$5, $$f13\n";
     } else {
-      IAH.Out(MI + "$$5,$$f12");
-      IAH.Out(MI + "$$4,$$f13");
+      AsmText += MI + "$$5, $$f12\n";
+      AsmText += MI + "$$4, $$f13\n";
     }
     break;
+
   case DDSig:
     if (LE) {
-      IAH.Out(MI + "$$4,$$f12");
-      IAH.Out(MI + "$$5,$$f13");
-      IAH.Out(MI + "$$6,$$f14");
-      IAH.Out(MI + "$$7,$$f15");
+      AsmText += MI + "$$4, $$f12\n";
+      AsmText += MI + "$$5, $$f13\n";
+      AsmText += MI + "$$6, $$f14\n";
+      AsmText += MI + "$$7, $$f15\n";
     } else {
-      IAH.Out(MI + "$$5,$$f12");
-      IAH.Out(MI + "$$4,$$f13");
-      IAH.Out(MI + "$$7,$$f14");
-      IAH.Out(MI + "$$6,$$f15");
+      AsmText += MI + "$$5, $$f12\n";
+      AsmText += MI + "$$4, $$f13\n";
+      AsmText += MI + "$$7, $$f14\n";
+      AsmText += MI + "$$6, $$f15\n";
     }
     break;
+
   case DFSig:
     if (LE) {
-      IAH.Out(MI + "$$4,$$f12");
-      IAH.Out(MI + "$$5,$$f13");
+      AsmText += MI + "$$4, $$f12\n";
+      AsmText += MI + "$$5, $$f13\n";
     } else {
-      IAH.Out(MI + "$$5,$$f12");
-      IAH.Out(MI + "$$4,$$f13");
+      AsmText += MI + "$$5, $$f12\n";
+      AsmText += MI + "$$4, $$f13\n";
     }
-    IAH.Out(MI + "$$6,$$f14");
+    AsmText += MI + "$$6, $$f14\n";
     break;
+
   case NoSig:
-    return;
+    break;
   }
+
+  return AsmText;
 }
 
 //
 // Make sure that we know we already need a stub for this function.
 // Having called needsFPHelperFromSig
 //
 static void assureFPCallStub(Function &F, Module *M,
                              const MipsTargetMachine &TM) {
FStub = Function::Create(F.getFunctionType(),
                            Function::InternalLinkage, StubName, M);
   FStub->addFnAttr("mips16_fp_stub");
   FStub->addFnAttr(llvm::Attribute::Naked);
   FStub->addFnAttr(llvm::Attribute::NoInline);
   FStub->addFnAttr(llvm::Attribute::NoUnwind);
   FStub->addFnAttr("nomips16");
   FStub->setSection(SectionName);
   BasicBlock *BB = BasicBlock::Create(Context, "entry", FStub);
-  InlineAsmHelper IAH(Context, BB);
-  IAH.Out(".set reorder");
   FPReturnVariant RV = whichFPReturnVariant(FStub->getReturnType());
   FPParamVariant PV = whichFPParamVariantNeeded(F);
-  swapFPIntParams(PV, M, IAH, LE, true);
+
+  std::string AsmText;
+  AsmText += ".set reorder\n";
+  AsmText += swapFPIntParams(PV, M, LE, true);
   if (RV != NoFPRet) {
-    IAH.Out("move $$18, $$31");
-    IAH.Out("jal " + Name);
+    AsmText += "move $$18, $$31\n";
+    AsmText += "jal " + Name + "\n";
   } else {
-    IAH.Out("lui  $$25,%hi(" + Name + ")");
-    IAH.Out("addiu  $$25,$$25,%lo(" + Name + ")" );
+    AsmText += "lui  $$25, %hi(" + Name + ")\n";
+    AsmText += "addiu  $$25, $$25, %lo(" + Name + ")\n";
   }
+
   switch (RV) {
   case FRet:
-    IAH.Out("mfc1 $$2,$$f0");
+    AsmText += "mfc1 $$2, $$f0\n";
     break;
+
   case DRet:
     if (LE) {
-      IAH.Out("mfc1 $$2,$$f0");
-      IAH.Out("mfc1 $$3,$$f1");
+      AsmText += "mfc1 $$2, $$f0\n";
+      AsmText += "mfc1 $$3, $$f1\n";
     } else {
-      IAH.Out("mfc1 $$3,$$f0");
-      IAH.Out("mfc1 $$2,$$f1");
+      AsmText += "mfc1 $$3, $$f0\n";
+      AsmText += "mfc1 $$2, $$f1\n";
     }
     break;
+
   case CFRet:
     if (LE) {
-      IAH.Out("mfc1 $$2,$$f0");
-      IAH.Out("mfc1 $$3,$$f2");
+      AsmText += "mfc1 $$2, $$f0\n";
+      AsmText += "mfc1 $$3, $$f2\n";
     } else {
-      IAH.Out("mfc1 $$3,$$f0");
-      IAH.Out("mfc1 $$3,$$f2");
+      AsmText += "mfc1 $$3, $$f0\n";
+      AsmText += "mfc1 $$3, $$f2\n";
     }
     break;
+
   case CDRet:
     if (LE) {
-      IAH.Out("mfc1 $$4,$$f2");
-      IAH.Out("mfc1 $$5,$$f3");
-      IAH.Out("mfc1 $$2,$$f0");
-      IAH.Out("mfc1 $$3,$$f1");
+      AsmText += "mfc1 $$4, $$f2\n";
+      AsmText += "mfc1 $$5, $$f3\n";
+      AsmText += "mfc1 $$2, $$f0\n";
+      AsmText += "mfc1 $$3, $$f1\n";
 
     } else {
-      IAH.Out("mfc1 $$5,$$f2");
-      IAH.Out("mfc1 $$4,$$f3");
-      IAH.Out("mfc1 $$3,$$f0");
-      IAH.Out("mfc1 $$2,$$f1");
+      AsmText += "mfc1 $$5, $$f2\n";
+      AsmText += "mfc1 $$4, $$f3\n";
+      AsmText += "mfc1 $$3, $$f0\n";
+      AsmText += "mfc1 $$2, $$f1\n";
     }
     break;
+
   case NoFPRet:
     break;
   }
+
   if (RV != NoFPRet)
-    IAH.Out("jr $$18");
+    AsmText += "jr $$18\n";
   else
-    IAH.Out("jr $$25");
+    AsmText += "jr $$25\n";
+  EmitInlineAsm(Context, BB, AsmText);
+
   new UnreachableInst(Context, BB);
 }
 
 //
 // Functions that are llvm intrinsics and don't need helpers.
 //
 static const char *const IntrinsicInline[] = {
   "fabs", "fabsf",
Function *FStub = Function::Create
      Function::InternalLinkage, StubName, M);
   FStub->addFnAttr("mips16_fp_stub");
   FStub->addFnAttr(llvm::Attribute::Naked);
   FStub->addFnAttr(llvm::Attribute::NoUnwind);
   FStub->addFnAttr(llvm::Attribute::NoInline);
   FStub->addFnAttr("nomips16");
   FStub->setSection(SectionName);
   BasicBlock *BB = BasicBlock::Create(Context, "entry", FStub);
-  InlineAsmHelper IAH(Context, BB);
+
+  std::string AsmText;
   if (PicMode) {
-    IAH.Out(".set noreorder");
-    IAH.Out(".cpload  $$25");
-    IAH.Out(".set reorder");
-    IAH.Out(".reloc 0,R_MIPS_NONE," + Name);
-    IAH.Out("la $$25," + LocalName);
-  }
-  else {
-    IAH.Out("la $$25," + Name);
-  }
-  swapFPIntParams(PV, M, IAH, LE, false);
-  IAH.Out("jr $$25");
-  IAH.Out(LocalName + " = " + Name);
+    AsmText += ".set noreorder\n";
+    AsmText += ".cpload $$25\n";
+    AsmText += ".set reorder\n";
+    AsmText += ".reloc 0, R_MIPS_NONE, " + Name + "\n";
+    AsmText += "la $$25, " + LocalName + "\n";
+  } else
+    AsmText += "la $$25, " + Name + "\n";
+  AsmText += swapFPIntParams(PV, M, LE, false);
+  AsmText += "jr $$25\n";
+  AsmText += LocalName + " = " + Name + "\n";
+  EmitInlineAsm(Context, BB, AsmText);
+
   new UnreachableInst(FStub->getContext(), BB);
 }
 
 //
 // remove the use-soft-float attribute
 //
 static void removeUseSoftFloat(Function &F) {
   AttributeSet A;

llvm/trunk/test/CodeGen/Mips/hf16call32.ll

land.end289:                                      ; preds = %land.rhs286, %land.end250
   %call291 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str4, i32 0, i32 0), double %ret_dc.real268, double %ret_dc.imag271, double %lret_dc.real272, double %lret_dc.imag275, double %conv276, double %conv277, i32 %land.ext290)
   %235 = load i32, i32* %retval
   ret i32 %235
 }
 
 declare void @v_sf(float) #1
 ; stel: .section .mips16.call.fp.v_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_v_sf
-; stel: mtc1 $4,$f12
-; stel: lui $25,%hi(v_sf)
-; stel: addiu $25,$25,%lo(v_sf)
+; stel: mtc1 $4, $f12
+; stel: lui $25, %hi(v_sf)
+; stel: addiu $25, $25, %lo(v_sf)
 ; stel: jr $25
 ; stel: .end __call_stub_fp_v_sf
 
 declare i32 @printf(i8*, ...) #1
 
 declare void @v_df(double) #1
 ; stel: .section .mips16.call.fp.v_df,"ax",@progbits
 ; stel: .ent __call_stub_fp_v_df
 ; stel: #APP
 ; setl: .set reorder
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f13
-; stel: lui $25,%hi(v_df)
-; stel: addiu $25,$25,%lo(v_df)
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f13
+; stel: lui $25, %hi(v_df)
+; stel: addiu $25, $25, %lo(v_df)
 ; stel: jr $25
 ; stel: .end __call_stub_fp_v_df
 
 declare void @v_sf_sf(float, float) #1
 ; stel: .section .mips16.call.fp.v_sf_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_v_sf_sf
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f14
-; stel: lui $25,%hi(v_sf_sf)
-; stel: addiu $25,$25,%lo(v_sf_sf)
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f14
+; stel: lui $25, %hi(v_sf_sf)
+; stel: addiu $25, $25, %lo(v_sf_sf)
 ; stel: jr $25
 ; stel: .end __call_stub_fp_v_sf_sf
 
 declare void @v_sf_df(float, double) #1
 ; stel: .section .mips16.call.fp.v_sf_df,"ax",@progbits
 ; stel: .ent __call_stub_fp_v_sf_df
-; stel: mtc1 $4,$f12
-; stel: mtc1 $6,$f14
-; stel: mtc1 $7,$f15
-; stel: lui $25,%hi(v_sf_df)
-; stel: addiu $25,$25,%lo(v_sf_df)
+; stel: mtc1 $4, $f12
+; stel: mtc1 $6, $f14
+; stel: mtc1 $7, $f15
+; stel: lui $25, %hi(v_sf_df)
+; stel: addiu $25, $25, %lo(v_sf_df)
 ; stel: jr $25
 ; stel: .end __call_stub_fp_v_sf_df
 
 declare void @v_df_sf(double, float) #1
 ; stel: .section .mips16.call.fp.v_df_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_v_df_sf
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f13
-; stel: mtc1 $6,$f14
-; stel: lui $25,%hi(v_df_sf)
-; stel: addiu $25,$25,%lo(v_df_sf)
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f13
+; stel: mtc1 $6, $f14
+; stel: lui $25, %hi(v_df_sf)
+; stel: addiu $25, $25, %lo(v_df_sf)
 ; stel: jr $25
 ; stel: .end __call_stub_fp_v_df_sf
 
 declare void @v_df_df(double, double) #1
 ; stel: .section .mips16.call.fp.v_df_df,"ax",@progbits
 ; stel: .ent __call_stub_fp_v_df_df
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f13
-; stel: mtc1 $6,$f14
-; stel: mtc1 $7,$f15
-; stel: lui $25,%hi(v_df_df)
-; stel: addiu $25,$25,%lo(v_df_df)
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f13
+; stel: mtc1 $6, $f14
+; stel: mtc1 $7, $f15
+; stel: lui $25, %hi(v_df_df)
+; stel: addiu $25, $25, %lo(v_df_df)
 ; stel: jr $25
 ; stel: .end __call_stub_fp_v_df_df
 
 declare float @sf_v() #1
 ; stel: .section .mips16.call.fp.sf_v,"ax",@progbits
 ; stel: .ent __call_stub_fp_sf_v
 ; stel: move $18, $31
 ; stel: jal sf_v
-; stel: mfc1 $2,$f0
+; stel: mfc1 $2, $f0
 ; stel: jr $18
 ; stel: .end __call_stub_fp_sf_v
 
 declare float @sf_sf(float) #1
 ; stel: .section .mips16.call.fp.sf_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_sf_sf
-; stel: mtc1 $4,$f12
+; stel: mtc1 $4, $f12
 ; stel: move $18, $31
 ; stel: jal sf_sf
-; stel: mfc1 $2,$f0
+; stel: mfc1 $2, $f0
 ; stel: jr $18
 ; stel: .end __call_stub_fp_sf_sf
 
 declare float @sf_df(double) #1
 ; stel: .section .mips16.call.fp.sf_df,"ax",@progbits
 ; stel: .ent __call_stub_fp_sf_df
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f13
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f13
 ; stel: move $18, $31
 ; stel: jal sf_df
-; stel: mfc1 $2,$f0
+; stel: mfc1 $2, $f0
 ; stel: jr $18
 ; stel: .end __call_stub_fp_sf_df
 
 declare float @sf_sf_sf(float, float) #1
 ; stel: .section .mips16.call.fp.sf_sf_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_sf_sf_sf
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f14
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f14
 ; stel: move $18, $31
 ; stel: jal sf_sf_sf
-; stel: mfc1 $2,$f0
+; stel: mfc1 $2, $f0
 ; stel: jr $18
 ; stel: .end __call_stub_fp_sf_sf_sf
 
 declare float @sf_sf_df(float, double) #1
 ; stel: .section .mips16.call.fp.sf_sf_df,"ax",@progbits
 ; stel: .ent __call_stub_fp_sf_sf_df
-; stel: mtc1 $4,$f12
-; stel: mtc1 $6,$f14
-; stel: mtc1 $7,$f15
+; stel: mtc1 $4, $f12
+; stel: mtc1 $6, $f14
+; stel: mtc1 $7, $f15
 ; stel: move $18, $31
 ; stel: jal sf_sf_df
-; stel: mfc1 $2,$f0
+; stel: mfc1 $2, $f0
 ; stel: jr $18
 ; stel: .end __call_stub_fp_sf_sf_df
 
 declare float @sf_df_sf(double, float) #1
 ; stel: .section .mips16.call.fp.sf_df_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_sf_df_sf
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f13
-; stel: mtc1 $6,$f14
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f13
+; stel: mtc1 $6, $f14
 ; stel: move $18, $31
 ; stel: jal sf_df_sf
-; stel: mfc1 $2,$f0
+; stel: mfc1 $2, $f0
 ; stel: jr $18
 ; stel: .end __call_stub_fp_sf_df_sf
 
 declare float @sf_df_df(double, double) #1
 ; stel: .section .mips16.call.fp.sf_df_df,"ax",@progbits
 ; stel: .ent __call_stub_fp_sf_df_df
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f13
-; stel: mtc1 $6,$f14
-; stel: mtc1 $7,$f15
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f13
+; stel: mtc1 $6, $f14
+; stel: mtc1 $7, $f15
 ; stel: move $18, $31
 ; stel: jal sf_df_df
-; stel: mfc1 $2,$f0
+; stel: mfc1 $2, $f0
 ; stel: jr $18
 ; stel: .end __call_stub_fp_sf_df_df
 
 declare double @df_v() #1
 ; stel: .section .mips16.call.fp.df_v,"ax",@progbits
 ; stel: .ent __call_stub_fp_df_v
 ; stel: move $18, $31
 ; stel: jal df_v
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f1
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f1
 ; stel: jr $18
 ; stel: .end __call_stub_fp_df_v
 
 declare double @df_sf(float) #1
 ; stel: .section .mips16.call.fp.df_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_df_sf
-; stel: mtc1 $4,$f12
+; stel: mtc1 $4, $f12
 ; stel: move $18, $31
 ; stel: jal df_sf
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f1
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f1
 ; stel: jr $18
 ; stel: .end __call_stub_fp_df_sf
 
 declare double @df_df(double) #1
 ; stel: .section .mips16.call.fp.df_df,"ax",@progbits
 ; stel: .ent __call_stub_fp_df_df
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f13
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f13
 ; stel: move $18, $31
 ; stel: jal df_df
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f1
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f1
 ; stel: jr $18
 ; stel: .end __call_stub_fp_df_df
 
 declare double @df_sf_sf(float, float) #1
 ; stel: .section .mips16.call.fp.df_sf_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_df_sf_sf
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f14
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f14
 ; stel: move $18, $31
 ; stel: jal df_sf_sf
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f1
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f1
 ; stel: jr $18
 ; stel: .end __call_stub_fp_df_sf_sf
 
 declare double @df_sf_df(float, double) #1
 ; stel: .section .mips16.call.fp.df_sf_df,"ax",@progbits
 ; stel: .ent __call_stub_fp_df_sf_df
-; stel: mtc1 $4,$f12
-; stel: mtc1 $6,$f14
-; stel: mtc1 $7,$f15
+; stel: mtc1 $4, $f12
+; stel: mtc1 $6, $f14
+; stel: mtc1 $7, $f15
 ; stel: move $18, $31
 ; stel: jal df_sf_df
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f1
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f1
 ; stel: jr $18
 ; stel: .end __call_stub_fp_df_sf_df
 
 declare double @df_df_sf(double, float) #1
 ; stel: .section .mips16.call.fp.df_df_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_df_df_sf
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f13
-; stel: mtc1 $6,$f14
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f13
+; stel: mtc1 $6, $f14
 ; stel: move $18, $31
 ; stel: jal df_df_sf
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f1
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f1
 ; stel: jr $18
 ; stel: .end __call_stub_fp_df_df_sf
 
 declare double @df_df_df(double, double) #1
 ; stel: .section .mips16.call.fp.df_df_df,"ax",@progbits
 ; stel: .ent __call_stub_fp_df_df_df
-; stel: mtc1 $4,$f12
-; stel: mtc1 $5,$f13
-; stel: mtc1 $6,$f14
-; stel: mtc1 $7,$f15
+; stel: mtc1 $4, $f12
+; stel: mtc1 $5, $f13
+; stel: mtc1 $6, $f14
+; stel: mtc1 $7, $f15
 ; stel: move $18, $31
 ; stel: jal df_df_df
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f1
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f1
 ; stel: jr $18
 ; stel: .end __call_stub_fp_df_df_df
 
 declare { float, float } @sc_v() #1
 ; stel: .section .mips16.call.fp.sc_v,"ax",@progbits
 ; stel: .ent __call_stub_fp_sc_v
 ; stel: move $18, $31
 ; stel: jal sc_v
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f2
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f2
 ; stel: jr $18
 ; stel: .end __call_stub_fp_sc_v
 
 declare { float, float } @sc_sf(float) #1
 ; stel: .section .mips16.call.fp.sc_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_sc_sf
-; stel: mtc1 $4,$f12
+; stel: mtc1 $4, $f12
 ; stel: move $18, $31
 ; stel: jal sc_sf
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f2
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f2
 ; stel: jr $18
 ; stel: .end __call_stub_fp_sc_sf
 
 declare { double, double } @dc_v() #1
 ; stel: .section .mips16.call.fp.dc_v,"ax",@progbits
 ; stel: .ent __call_stub_fp_dc_v
 ; stel: move $18, $31
 ; stel: jal dc_v
-; stel: mfc1 $4,$f2
-; stel: mfc1 $5,$f3
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f1
+; stel: mfc1 $4, $f2
+; stel: mfc1 $5, $f3
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f1
 ; stel: jr $18
 ; stel: .end __call_stub_fp_dc_v
 
 declare { double, double } @dc_sf(float) #1
 ; stel: .section .mips16.call.fp.dc_sf,"ax",@progbits
 ; stel: .ent __call_stub_fp_dc_sf
-; stel: mtc1 $4,$f12
+; stel: mtc1 $4, $f12
 ; stel: move $18, $31
 ; stel: jal dc_sf
-; stel: mfc1 $4,$f2
-; stel: mfc1 $5,$f3
-; stel: mfc1 $2,$f0
-; stel: mfc1 $3,$f1
+; stel: mfc1 $4, $f2
+; stel: mfc1 $5, $f3
+; stel: mfc1 $2, $f0
+; stel: mfc1 $3, $f1
 ; stel: jr $18
 ; stel: .end __call_stub_fp_dc_sf
 
 attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
 attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }

llvm/trunk/test/CodeGen/Mips/hf16call32_body.ll

entry:
   %p.addr = alloca float, align 4
   store float %p, float* %p.addr, align 4
   %0 = load float, float* %p.addr, align 4
   store float %0, float* @x, align 4
   ret void
 }
 ; stel: .section .mips16.fn.v_sf,"ax",@progbits
 ; stel: .ent __fn_stub_v_sf
-; stel: la $25,v_sf
-; stel: mfc1 $4,$f12
+; stel: la $25, v_sf
+; stel: mfc1 $4, $f12
 ; stel: jr $25
 ; stel: __fn_local_v_sf = v_sf
 ; stel: .end __fn_stub_v_sf
 
 declare i32 @printf(i8*, ...) #1
 
 ; Function Attrs: nounwind
 define void @v_df(double %p) #0 {
 entry:
   %p.addr = alloca double, align 8
   store double %p, double* %p.addr, align 8
   %0 = load double, double* %p.addr, align 8
   store double %0, double* @xd, align 8
   ret void
 }
 
 ; stel: .section .mips16.fn.v_df,"ax",@progbits
 ; stel: .ent __fn_stub_v_df
-; stel: la $25,v_df
-; stel: mfc1 $4,$f12
-; stel: mfc1 $5,$f13
+; stel: la $25, v_df
+; stel: mfc1 $4, $f12
+; stel: mfc1 $5, $f13
 ; stel: jr $25
 ; stel: __fn_local_v_df = v_df
 ; stel: .end __fn_stub_v_df
 
 ; Function Attrs: nounwind
 define void @v_sf_sf(float %p1, float %p2) #0 {
 entry:
   %p1.addr = alloca float, align 4
   %p2.addr = alloca float, align 4
   store float %p1, float* %p1.addr, align 4
   store float %p2, float* %p2.addr, align 4
   %0 = load float, float* %p1.addr, align 4
   store float %0, float* @x, align 4
   %1 = load float, float* %p2.addr, align 4
   store float %1, float* @y, align 4
   ret void
 }
 
 ; stel: .section .mips16.fn.v_sf_sf,"ax",@progbits
 ; stel: .ent __fn_stub_v_sf_sf
-; stel: la $25,v_sf_sf
-; stel: mfc1 $4,$f12
-; stel: mfc1 $5,$f14
+; stel: la $25, v_sf_sf
+; stel: mfc1 $4, $f12
+; stel: mfc1 $5, $f14
 ; stel: jr $25
 ; stel: __fn_local_v_sf_sf = v_sf_sf
 ; stel: .end __fn_stub_v_sf_sf
 
 ; Function Attrs: nounwind
 define void @v_sf_df(float %p1, double %p2) #0 {
 entry:
   %p1.addr = alloca float, align 4
   %p2.addr = alloca double, align 8
   store float %p1, float* %p1.addr, align 4
   store double %p2, double* %p2.addr, align 8
   %0 = load float, float* %p1.addr, align 4
   store float %0, float* @x, align 4
   %1 = load double, double* %p2.addr, align 8
   store double %1, double* @yd, align 8
   ret void
 }
 
 ; stel: .section .mips16.fn.v_sf_df,"ax",@progbits
 ; stel: .ent __fn_stub_v_sf_df
-; stel: la $25,v_sf_df
-; stel: mfc1 $4,$f12
-; stel: mfc1 $6,$f14
-; stel: mfc1 $7,$f15
+; stel: la $25, v_sf_df
+; stel: mfc1 $4, $f12
+; stel: mfc1 $6, $f14
+; stel: mfc1 $7, $f15
 ; stel: jr $25
 ; stel: __fn_local_v_sf_df = v_sf_df
 ; stel: .end __fn_stub_v_sf_df
 
 ; Function Attrs: nounwind
 define void @v_df_sf(double %p1, float %p2) #0 {
 entry:
   %p1.addr = alloca double, align 8
   %p2.addr = alloca float, align 4
   store double %p1, double* %p1.addr, align 8
   store float %p2, float* %p2.addr, align 4
   %0 = load double, double* %p1.addr, align 8
   store double %0, double* @xd, align 8
   %1 = load float, float* %p2.addr, align 4
   store float %1, float* @y, align 4
   ret void
 }
 
 ; stel: .section .mips16.fn.v_df_sf,"ax",@progbits
 ; stel: .ent __fn_stub_v_df_sf
-; stel: la $25,v_df_sf
-; stel: mfc1 $4,$f12
-; stel: mfc1 $5,$f13
-; stel: mfc1 $6,$f14
+; stel: la $25, v_df_sf
+; stel: mfc1 $4, $f12
+; stel: mfc1 $5, $f13
+; stel: mfc1 $6, $f14
 ; stel: jr $25
 ; stel: __fn_local_v_df_sf = v_df_sf
 ; stel: .end __fn_stub_v_df_sf
 
 ; Function Attrs: nounwind
 define void @v_df_df(double %p1, double %p2) #0 {
 entry:
   %p1.addr = alloca double, align 8
   %p2.addr = alloca double, align 8
   store double %p1, double* %p1.addr, align 8
   store double %p2, double* %p2.addr, align 8
   %0 = load double, double* %p1.addr, align 8
   store double %0, double* @xd, align 8
   %1 = load double, double* %p2.addr, align 8
   store double %1, double* @yd, align 8
   ret void
 }
 
 ; stel: .section .mips16.fn.v_df_df,"ax",@progbits
 ; stel: .ent __fn_stub_v_df_df
-; stel: la $25,v_df_df
-; stel: mfc1 $4,$f12
-; stel: mfc1 $5,$f13
-; stel: mfc1 $6,$f14
-; stel: mfc1 $7,$f15
+; stel: la $25, v_df_df
+; stel: mfc1 $4, $f12
+; stel: mfc1 $5, $f13
+; stel: mfc1 $6, $f14
+; stel: mfc1 $7, $f15
 ; stel: jr $25
 ; stel: __fn_local_v_df_df = v_df_df
 ; stel: .end __fn_stub_v_df_df
 
 ; Function Attrs: nounwind
 define float @sf_v() #0 {
 entry:
   %0 = load float, float* @ret_sf, align 4
entry:
   store float %0, float* @x, align 4
   %1 = load float, float* @ret_sf, align 4
   ret float %1
 }
 
 
 ; stel: .section .mips16.fn.sf_sf,"ax",@progbits
 ; stel: .ent __fn_stub_sf_sf
-; stel: la $25,sf_sf
-; stel: mfc1 $4,$f12
+; stel: la $25, sf_sf
+; stel: mfc1 $4, $f12
 ; stel: jr $25
 ; stel: __fn_local_sf_sf = sf_sf
 ; stel: .end __fn_stub_sf_sf
 
 
 ; Function Attrs: nounwind
 define float @sf_df(double %p) #0 {
 entry:
   %p.addr = alloca double, align 8
   store double %p, double* %p.addr, align 8
   %0 = load double, double* %p.addr, align 8
   store double %0, double* @xd, align 8
   %1 = load float, float* @ret_sf, align 4
   ret float %1
 }
 
 ; stel: .section .mips16.fn.sf_df,"ax",@progbits
 ; stel: .ent __fn_stub_sf_df
-; stel: la $25,sf_df
-; stel: mfc1 $4,$f12
-; stel: mfc1 $5,$f13
+; stel: la $25, sf_df
+; stel: mfc1 $4, $f12
+; stel: mfc1 $5, $f13
 ; stel: jr $25
 ; stel: __fn_local_sf_df = sf_df
 ; stel: .end __fn_stub_sf_df
 
 ; Function Attrs: nounwind
 define float @sf_sf_sf(float %p1, float %p2) #0 {
 entry:
   %p1.addr = alloca float, align 4
   %p2.addr = alloca float, align 4
   store float %p1, float* %p1.addr, align 4
   store float %p2, float* %p2.addr, align 4
   %0 = load float, float* %p1.addr, align 4
   store float %0, float* @x, align 4
   %1 = load float, float* %p2.addr, align 4
   store float %1, float* @y, align 4
   %2 = load float, float* @ret_sf, align 4
   ret float %2
 }
 
 ; stel: .section .mips16.fn.sf_sf_sf,"ax",@progbits
 ; stel: .ent __fn_stub_sf_sf_sf
-; stel: la $25,sf_sf_sf
-; stel: mfc1 $4,$f12
-; stel: mfc1 $5,$f14
+; stel: la $25, sf_sf_sf
+; stel: mfc1 $4, $f12
+; stel: mfc1 $5, $f14
 ; stel: jr $25
 ; stel: __fn_local_sf_sf_sf = sf_sf_sf
 ; stel: .end __fn_stub_sf_sf_sf
 
 ; Function Attrs: nounwind
 define float @sf_sf_df(float %p1, double %p2) #0 {
 entry:
   %p1.addr = alloca float, align 4
   %p2.addr = alloca double, align 8
   store float %p1, float* %p1.addr, align 4
   store double %p2, double* %p2.addr, align 8
   %0 = load float, float* %p1.addr, align 4
   store float %0, float* @x, align 4
   %1 = load double, double* %p2.addr, align 8
   store double %1, double* @yd, align 8
   %2 = load float, float* @ret_sf, align 4
   ret float %2
 }
 
 ; stel: .section .mips16.fn.sf_sf_df,"ax",@progbits
 ; stel: .ent __fn_stub_sf_sf_df
-; stel: la $25,sf_sf_df
-; stel: mfc1 $4,$f12
-; stel: mfc1 $6,$f14
-; stel: mfc1 $7,$f15
+; stel: la $25, sf_sf_df
+; stel: mfc1 $4, $f12
+; stel: mfc1 $6, $f14
+; stel: mfc1 $7, $f15
 ; stel: jr $25
 ; stel: __fn_local_sf_sf_df = sf_sf_df
 ; stel: .end __fn_stub_sf_sf_df
 
 ; Function Attrs: nounwind
 define float @sf_df_sf(double %p1, float %p2) #0 {
 entry:
   %p1.addr = alloca double, align 8
   %p2.addr = alloca float, align 4
   store double %p1, double* %p1.addr, align 8
   store float %p2, float* %p2.addr, align 4
   %0 = load double, double* %p1.addr, align 8
   store double %0, double* @xd, align 8
   %1 = load float, float* %p2.addr, align 4
   store float %1, float* @y, align 4
   %2 = load float, float* @ret_sf, align 4
   ret float %2
 }
 
 ; stel: .section .mips16.fn.sf_df_sf,"ax",@progbits
 ; stel: .ent __fn_stub_sf_df_sf
-; stel: la $25,sf_df_sf
-; stel: mfc1 $4,$f12
-; stel: mfc1 $5,$f13
-; stel: mfc1 $6,$f14
+; stel: la $25, sf_df_sf
+; stel: mfc1 $4, $f12
+; stel: mfc1 $5, $f13
+; stel: mfc1 $6, $f14
 ; stel: jr $25
 ; stel: __fn_local_sf_df_sf = sf_df_sf
 ; stel: .end __fn_stub_sf_df_sf
 
 ; Function Attrs: nounwind
 define float @sf_df_df(double %p1, double %p2) #0 {
 entry:
   %p1.addr = alloca double, align 8
   %p2.addr = alloca double, align 8
   store double %p1, double* %p1.addr, align 8
   store double %p2, double* %p2.addr, align 8
   %0 = load double, double* %p1.addr, align 8
   store double %0, double* @xd, align 8
   %1 = load double, double* %p2.addr, align 8
   store double %1, double* @yd, align 8
   %2 = load float, float* @ret_sf, align 4
   ret float %2
 }
 
 ; stel: .section .mips16.fn.sf_df_df,"ax",@progbits
 ; stel: .ent __fn_stub_sf_df_df
-; stel: la $25,sf_df_df
-; stel: mfc1 $4,$f12
-; stel: mfc1 $5,$f13
-; stel: mfc1 $6,$f14
-; stel: mfc1 $7,$f15
+; stel: la $25, sf_df_df
+; stel: mfc1 $4, $f12
+; stel: mfc1 $5, $f13
+; stel: mfc1 $6, $f14
+; stel: mfc1 $7, $f15
 ; stel: jr $25
 ; stel: __fn_local_sf_df_df = sf_df_df
 ; stel: .end __fn_stub_sf_df_df
 
 attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }

llvm/trunk/test/CodeGen/Mips/hf1_body.ll

 ; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=picfp16
 
 @x = external global float
 
 ; Function Attrs: nounwind
 define void @v_sf(float %p) #0 {
 entry:
   %p.addr = alloca float, align 4
   store float %p, float* %p.addr, align 4
   %0 = load float, float* %p.addr, align 4
   store float %0, float* @x, align 4
   ret void
 }
 ; picfp16: .ent __fn_stub_v_sf
 ; picfp16: .cpload $25
 ; picfp16: .set reorder
-; picfp16: .reloc 0,R_MIPS_NONE,v_sf
-; picfp16: la $25,$__fn_local_v_sf
-; picfp16: mfc1 $4,$f12
+; picfp16: .reloc 0, R_MIPS_NONE, v_sf
+; picfp16: la $25, $__fn_local_v_sf
+; picfp16: mfc1 $4, $f12
 ; picfp16: jr $25
 ; picfp16: .end __fn_stub_v_sf