New MSan mapping layout (llvm part)

[eugenis]

Summary

This is the llvm part of http://reviews.llvm.org/D13568

[samsonov]

LGTM

[eugenis]

r249753

lib/Transforms/Instrumentation/MemorySanitizer.cpp

static const MemoryMapParams Linux_I386_MemoryMapParams = {
   0x000080000000,  // AndMask
   0,               // XorMask (not used)
   0,               // ShadowBase (not used)
   0x000040000000,  // OriginBase
 };
 
 // x86_64 Linux
 static const MemoryMapParams Linux_X86_64_MemoryMapParams = {
+#ifdef MSAN_LINUX_X86_64_OLD_MAPPING
   0x400000000000,  // AndMask
   0,               // XorMask (not used)
   0,               // ShadowBase (not used)
   0x200000000000,  // OriginBase
+#else
+  0,               // AndMask (not used)
+  0x500000000000,  // XorMask
+  0,               // ShadowBase (not used)
+  0x100000000000,  // OriginBase
+#endif
 };
 
 // mips64 Linux
 static const MemoryMapParams Linux_MIPS64_MemoryMapParams = {
   0x004000000000,  // AndMask
   0,               // XorMask (not used)
   0,               // ShadowBase (not used)
   0x002000000000,  // OriginBase
Value *convertToShadowTyNoVec(Value *V, IRBuilder<> &IRB) {
     return IRB.CreateBitCast(V, NoVecTy);
   }
 
   /// \brief Compute the integer shadow offset that corresponds to a given
   /// application address.
   ///
   /// Offset = (Addr & ~AndMask) ^ XorMask
   Value *getShadowPtrOffset(Value *Addr, IRBuilder<> &IRB) {
+    Value *OffsetLong = IRB.CreatePointerCast(Addr, MS.IntptrTy);
+
     uint64_t AndMask = MS.MapParams->AndMask;
-    assert(AndMask != 0 && "AndMask shall be specified");
-    Value *OffsetLong =
-      IRB.CreateAnd(IRB.CreatePointerCast(Addr, MS.IntptrTy),
-                    ConstantInt::get(MS.IntptrTy, ~AndMask));
+    if (AndMask)
+      OffsetLong =
+          IRB.CreateAnd(OffsetLong, ConstantInt::get(MS.IntptrTy, ~AndMask));
 
     uint64_t XorMask = MS.MapParams->XorMask;
-    if (XorMask != 0)
-      OffsetLong = IRB.CreateXor(OffsetLong,
-                                 ConstantInt::get(MS.IntptrTy, XorMask));
+    if (XorMask)
+      OffsetLong =
+          IRB.CreateXor(OffsetLong, ConstantInt::get(MS.IntptrTy, XorMask));
     return OffsetLong;
   }
 
   /// \brief Compute the shadow address that corresponds to a given application
   /// address.
   ///
   /// Shadow = ShadowBase + Offset
   Value *getShadowPtr(Value *Addr, Type *ShadowTy,

test/Instrumentation/MemorySanitizer/origin-alignment.ll

entry:
   store i8 %x, i8* @a8, align 8
   ret void
 }
 
 ; CHECK-LABEL: @Store8
 ; CHECK-ORIGINS1: [[ORIGIN:%[01-9a-z]+]] = load {{.*}} @__msan_param_origin_tls
 ; CHECK-ORIGINS2: [[ORIGIN0:%[01-9a-z]+]] = load {{.*}} @__msan_param_origin_tls
 ; CHECK-ORIGINS2: [[ORIGIN:%[01-9a-z]+]] = call i32 @__msan_chain_origin(i32 [[ORIGIN0]])
-; CHECK: store i32 [[ORIGIN]],  i32* inttoptr (i64 add (i64 and (i64 ptrtoint {{.*}} to i32*), align 8
+; CHECK: store i32 [[ORIGIN]], i32* inttoptr (i64 add (i64 xor (i64 ptrtoint (i8* @a8 to i64), i64 {{.*}}), i64 {{.*}}) to i32*), align 8
 ; CHECK: ret void
 
 
 ; 4-aligned store => 4-aligned origin store, origin address is not realigned
 define void @Store4(i8 %x) sanitize_memory {
 entry:
   store i8 %x, i8* @a4, align 4
   ret void
 }
 
 ; CHECK-LABEL: @Store4
 ; CHECK-ORIGINS1: [[ORIGIN:%[01-9a-z]+]] = load {{.*}} @__msan_param_origin_tls
 ; CHECK-ORIGINS2: [[ORIGIN0:%[01-9a-z]+]] = load {{.*}} @__msan_param_origin_tls
 ; CHECK-ORIGINS2: [[ORIGIN:%[01-9a-z]+]] = call i32 @__msan_chain_origin(i32 [[ORIGIN0]])
-; CHECK: store i32 [[ORIGIN]],  i32* inttoptr (i64 add (i64 and (i64 ptrtoint {{.*}} to i32*), align 4
+; CHECK: store i32 [[ORIGIN]], i32* inttoptr (i64 add (i64 xor (i64 ptrtoint (i8* @a4 to i64), i64 {{.*}}), i64 {{.*}}) to i32*), align 4
 ; CHECK: ret void
 
 
 ; 2-aligned store => 4-aligned origin store, origin address is realigned
 define void @Store2(i8 %x) sanitize_memory {
 entry:
   store i8 %x, i8* @a2, align 2
   ret void
 }
 
 ; CHECK-LABEL: @Store2
 ; CHECK-ORIGINS1: [[ORIGIN:%[01-9a-z]+]] = load {{.*}} @__msan_param_origin_tls
 ; CHECK-ORIGINS2: [[ORIGIN0:%[01-9a-z]+]] = load {{.*}} @__msan_param_origin_tls
 ; CHECK-ORIGINS2: [[ORIGIN:%[01-9a-z]+]] = call i32 @__msan_chain_origin(i32 [[ORIGIN0]])
-; CHECK: store i32 [[ORIGIN]],  i32* inttoptr (i64 and (i64 add (i64 and (i64 ptrtoint {{.*}} i64 -4) to i32*), align 4
+; CHECK: store i32 [[ORIGIN]],  i32* inttoptr (i64 and (i64 add (i64 xor (i64 ptrtoint (i8* @a2 to i64), i64 {{.*}}), i64 {{.*}}), i64 -4) to i32*), align 4
+
 ; CHECK: ret void
 
 
 ; 1-aligned store => 4-aligned origin store, origin address is realigned
 define void @Store1(i8 %x) sanitize_memory {
 entry:
   store i8 %x, i8* @a1, align 1
   ret void
 }
 
 ; CHECK-LABEL: @Store1
 ; CHECK-ORIGINS1: [[ORIGIN:%[01-9a-z]+]] = load {{.*}} @__msan_param_origin_tls
 ; CHECK-ORIGINS2: [[ORIGIN0:%[01-9a-z]+]] = load {{.*}} @__msan_param_origin_tls
 ; CHECK-ORIGINS2: [[ORIGIN:%[01-9a-z]+]] = call i32 @__msan_chain_origin(i32 [[ORIGIN0]])
-; CHECK: store i32 [[ORIGIN]],  i32* inttoptr (i64 and (i64 add (i64 and (i64 ptrtoint {{.*}} i64 -4) to i32*), align 4
+; CHECK: store i32 [[ORIGIN]], i32* inttoptr (i64 and (i64 add (i64 xor (i64 ptrtoint (i8* @a1 to i64), i64 {{.*}}), i64 {{.*}}), i64 -4) to i32*), align 4
+
 ; CHECK: ret void