LivePhysRegs: Fix live-outs of return block.

[MatzeB]

Summary

The live-out set computed for the return block is currently missing the callee saved registers (the non-pristine ones to be exact).

This only affects the liveness computed for instructions inside the
function epilogue which currently none of the LivePhysRegs users in llvm
cares about, so this is just a drive-by fix without a testcase.

[hfinkel]

LGTM.

Indeed, the only current users of this are in ARM/ARMLoadStoreOptimizer.cpp and ARM/Thumb1FrameLowering.cpp, but looking at the way that ARMLoadStoreOpt::findFreeReg and ARMLoadStoreOpt::moveLiveRegsBefore work, it seems that this fix will prevent a problem should shrink-wrapping be enabled.

llvm/trunk/include/llvm/CodeGen/LivePhysRegs.h

void stepForward(const MachineInstr &MI,
         SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> &Clobbers);
 
   /// \brief Adds all live-in registers of basic block @p MBB; After prologue/
   /// epilogue insertion \p AddPristines should be set to true to insert the
   /// pristine registers.
   void addLiveIns(const MachineBasicBlock *MBB, bool AddPristines = false);
 
   /// \brief Adds all live-out registers of basic block @p MBB; After prologue/
-  /// epilogue insertion \p AddPristines should be set to true to insert the
-  /// pristine registers.
-  void addLiveOuts(const MachineBasicBlock *MBB, bool AddPristines = false);
+  /// epilogue insertion \p AddPristinesAndCSRs should be set to true.
+  void addLiveOuts(const MachineBasicBlock *MBB,
+                   bool AddPristinesAndCSRs = false);
 
   typedef SparseSet<unsigned>::const_iterator const_iterator;
   const_iterator begin() const { return LiveRegs.begin(); }
   const_iterator end() const { return LiveRegs.end(); }
 
   /// \brief Prints the currently live registers to @p OS.
   void print(raw_ostream &OS) const;
 

llvm/trunk/lib/CodeGen/LivePhysRegs.cpp

static void addPristines(LivePhysRegs &LiveRegs, const MachineFunction &MF,
 
   for (const MCPhysReg *CSR = TRI.getCalleeSavedRegs(&MF); CSR && *CSR; ++CSR)
     LiveRegs.addReg(*CSR);
   for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
     LiveRegs.removeReg(Info.getReg());
 }
 
 void LivePhysRegs::addLiveOuts(const MachineBasicBlock *MBB,
-                               bool AddPristines) {
-  if (AddPristines) {
+                               bool AddPristinesAndCSRs) {
+  if (AddPristinesAndCSRs) {
     const MachineFunction &MF = *MBB->getParent();
     addPristines(*this, MF, *TRI);
+    if (!MBB->isReturnBlock()) {
+      // The return block has no successors whose live-ins we could merge
+      // below. So instead we add the callee saved registers manually.
+      for (const MCPhysReg *I = TRI->getCalleeSavedRegs(&MF); *I; ++I)
+        addReg(*I);
     }
+  }
+
+  // To get the live-outs we simply merge the live-ins of all successors.
   for (const MachineBasicBlock *Succ : MBB->successors())
     ::addLiveIns(*this, *Succ);
 }
 
 void LivePhysRegs::addLiveIns(const MachineBasicBlock *MBB,
                               bool AddPristines) {
   if (AddPristines) {
     const MachineFunction &MF = *MBB->getParent();
     addPristines(*this, MF, *TRI);
   }
   ::addLiveIns(*this, *MBB);
 }