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[mips64] Emit correct addend for R_MIPS_PC16, R_MIPS_PC21_S2 and R_MIPS_PC26_S2 relocations.
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Authored by vradosavljevic on Jun 19 2015, 6:57 AM.

Details

Summary

So far, for N64 and N32 ABI we didn't emit correct addend. This patch fix that. It also removes fixup from MCJIT for R_MIPS_PC16 relocation.

Diff Detail

Repository
rL LLVM

Event Timeline

vradosavljevic retitled this revision from to [mips64] Emit correct addend for R_MIPS_PC16, R_MIPS_PC21_S2 and R_MIPS_PC26_S2 relocations..
vradosavljevic updated this object.
vradosavljevic edited the test plan for this revision. (Show Details)
vradosavljevic added reviewers: dsanders, petarj.
vradosavljevic set the repository for this revision to rL LLVM.
vradosavljevic added a subscriber: Unknown Object (MLST).
dsanders accepted this revision.Jun 22 2015, 7:02 AM
dsanders edited edge metadata.

LGTM with some formatting nits.

lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
229–230 ↗(On Diff #28020)

Nit: Indent according to what clang-format would do

319–320 ↗(On Diff #28020)

Likewise

342–343 ↗(On Diff #28020)

Likewise

This revision is now accepted and ready to land.Jun 22 2015, 7:02 AM
vradosavljevic edited edge metadata.

Comments addressed.

vradosavljevic added inline comments.Jun 22 2015, 8:32 AM
lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
229–230 ↗(On Diff #28020)

Done.

319–320 ↗(On Diff #28020)

Done.

342–343 ↗(On Diff #28020)

Done.

petarj accepted this revision.Jun 23 2015, 6:58 AM
petarj edited edge metadata.

lgtm

This revision was automatically updated to reflect the committed changes.