Change Details

The [RISC-V hard float calling convention](https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#hardware-floating-point-calling-convention) requires the frontend to: * Detect cases where, once "flattened", a struct can be passed using int+fp or fp+fp registers under the hard float ABI and coerce to the appropriate type(s) * Track usage of GPRs and FPRs in order to gate the above, and to determine when signext/zeroext attributes must be added to integer scalars This patch attempts to do this in compliance with the documented ABI, and uses ABIArgInfo::CoerceAndExpand in order to do this. @rjmccall, as author of that code I've tagged you as reviewer for initial feedback on my usage. Note that a previous version of the ABI indicated that when passing an int+fp struct using a GPR+FPR, the int would need to be sign or zero-extended appropriately. GCC [never did this](https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86387) and the ABI [was changed](https://github.com/riscv/riscv-elf-psabi-doc/pull/74), which makes life easier as ABIArgInfo::CoerceAndExpand can't currently handle sign/zero-extension attributes. I'm sharing just in case there are any concerns about this general approach. Known deficiencies in this patch are all related to testing: * Needs more basic ilp32d/lp64f/lp64d tests * Not enough coverage of bitfields in structs, packed+aligned structs etc

The [RISC-V hard float calling convention](https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#hardware-floating-point-calling-convention) requires the frontend to: * Detect cases where, once "flattened", a struct can be passed using int+fp or fp+fp registers under the hard float ABI and coerce to the appropriate type(s) * Track usage of GPRs and FPRs in order to gate the above, and to determine when signext/zeroext attributes must be added to integer scalars This patch attempts to do this in compliance with the documented ABI, and uses ABIArgInfo::CoerceAndExpand in order to do this. @rjmccall, as author of that code I've tagged you as reviewer for initial feedback on my usage. Note that a previous version of the ABI indicated that when passing an int+fp struct using a GPR+FPR, the int would need to be sign or zero-extended appropriately. GCC [never did this](https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86387) and the ABI [was changed](https://github.com/riscv/riscv-elf-psabi-doc/pull/74), which makes life easier as ABIArgInfo::CoerceAndExpand can't currently handle sign/zero-extension attributes.

The [RISC-V hard float calling convention](https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#hardware-floating-point-calling-convention) requires the frontend to: * Detect cases where, once "flattened", a struct can be passed using int+fp or fp+fp registers under the hard float ABI and coerce to the appropriate type(s) * Track usage of GPRs and FPRs in order to gate the above, and to determine when signext/zeroext attributes must be added to integer scalars This patch attempts to do this in compliance with the documented ABI, and uses ABIArgInfo::CoerceAndExpand in order to do this. @rjmccall, as author of that code I've tagged you as reviewer for initial feedback on my usage. Note that a previous version of the ABI indicated that when passing an int+fp struct using a GPR+FPR, the int would need to be sign or zero-extended appropriately. GCC [never did this](https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86387) and the ABI [was changed](https://github.com/riscv/riscv-elf-psabi-doc/pull/74), which makes life easier as ABIArgInfo::CoerceAndExpand can't currently handle sign/zero-extension attributes. I'm sharing just in case there are any concerns about this general approach. Known deficiencies in this patch are all related to testing: * Needs more basic ilp32d/lp64f/lp64d tests * Not enough coverage of bitfields in structs, packed+aligned structs etc