The attiny4/attiny5/attiny9/attiny10 have a slightly modified instruction set that drops a number of useful instructions. This patch makes sure to not emit them on these "reduced tiny" cores.
The affected instructions are:
- lds and sts (load/store directly from data)
- ldd and std (load/store with displacement)
- adiw and sbiw (add/sub register pairs)
- various other instructions that were emitted without checking whether the chip actually supports them (movw, adiw, etc)
There is a variant on lds and sts on these chips, but it can only address a limited portion of the address space and is mainly useful to load/store I/O registers (as an extension to the in and out instructions). I have not implemented it here, implementing it can be done in a separate patch.
This patch is not optimal. I'm sure it can be improved a lot. For example, we could teach the instruction selector to not select lddw/stdw instructions so that the weird pointer adjustments are not necessary. But for now I've focused just on correctness, not on code quality.