This is a preparatory step for D34515
- makes nodes `ISD::ADDCARRY` and `ISD::SUBCARRY` legal for `i32`
- lowering is done by first converting the boolean value into the carry flag using `(_, C) ← (ARMISD::ADDC R, -1)` and converted back to an integer value using `(R, _) ← (ARMISD::ADDE 0, 0, C)`. An `ARMISD::ADDE` between the two operations does the actual addition.
- for subtraction, given that `ISD::SUBCARRY` second result is actually a borrow, the conversion back to an integer value is done using `(R, _) ← (ARMISD::SUBE 1, 0, C)`. Here `C` is the carry value generated by the `ARMISD::SUBE` that does the actual subtraction.we need to invert the value of the second operand and result before and after using `ARMISD::SUBE`
- given that the generic combiner may lower `ISD::ADDCARRY` and `ISD::SUBCARRY`into `ISD::UADDO` and `ISD::USUBO` we need to update their lowering as well otherwise `i64` operations now would require branches. This implies updating the corresponding test for unsigned.
- adds new target specific combiners for sequences that conceptually do `R1 ← carryToReg(C0); C1 ← regToCarry(R1)` (just use `C0`) and their dual `C1 ← regToCarry(R0); R1 ← carryToReg(C1)` (just use `R0`).
- add a new target specific combiner for `R1 ← SUBC(1, SUBC(1, R0))` (just use `R0`)