See more detailed analysis in https://bugs.llvm.org/show_bug.cgi?id=36311.
isUniform() information is recomputed after LV started transforming the underlying IR and that triggered an assert in SCEV.
From vectorizer's architectural perspective, such information, while still useful in vector code gen, should not be recomputed after the start of transforming the LLVM IR. Instead, we should collect and cache such information during the analysis phase of LV and use the cached info during code gen.
From the symptom perspective, this assert as it stands right now is not very useful. Legality already rejected loops that would trigger the assert. As such, commenting out the assert is NFC from vectorizer's functionality perspective.
From vectorization theory point of view, we don't have to reject all cases of stores to uniform addresses. Eventually, we should support safe/profitable cases.
This patch works around the assert in the SCEV by simply commenting out the (useless) assert in LV in case someone needs immediate action. Real solution to PR36311 should come from fixing the architectural problem --- guesstimated ETA is 3 weeks.