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[IntrinsicEmitter] Support scalable vectors in intrinsics

Description

[IntrinsicEmitter] Support scalable vectors in intrinsics

Summary:
This patch adds support for scalable vectors in intrinsics, enabling
intrinsics such as the following to be defined:

declare <vscale x 4 x i32> @llvm.something.nxv4i32(<vscale x 4 x i32>)

Support for this is implemented by defining a new type descriptor for
scalable vectors and adding mangling support for scalable vector types
in the name mangling scheme used by 'any' types in intrinsic signatures.

Tests have been added for IRBuilder to test scalable vectors work as
expected when using intrinsics through this interface. This required
implementing an intrinsic that is explicitly defined with scalable
vectors, e.g. LLVMType<nxv4i32>, an SVE floating-point convert
intrinsic was used for this. The behaviour of the overloaded type
LLVMScalarOrSameVectorWidth with scalable vectors is tested using the
existing masked load intrinsic. Also added an .ll test to test the
Verifier catches a bad intrinsic argument when passing a fixed-width
predicate (mask) to the masked.load intrinsic where a scalable is
expected.

Patch by Paul Walker

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D65930

Details

Committed
c-rhodesAug 27 2019, 5:57 AM
Reviewer
sdesmalen
Differential Revision
D65930: [IntrinsicEmitter] Support scalable vectors in intrinsics
Parents
rL370052: Implement codegen for MSVC unions with reference members.
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