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[ELF][AArch64] Support for movz, movk tprel relocations

Description

[ELF][AArch64] Support for movz, movk tprel relocations

This patch Implements the R_AARCH64_TLSLE_MOVW_TPREL_G*[_NC]. These are
logically the same calculation as the existing TLSLE relocations with
the result written back to mov[nz] and movk instructions. A typical code
sequence is:
movz x0, #:tprel_g2:foo bits [47:32] of R_TLS with overflow check
movk x0, #:tprel_g1_nc:foo
bits [31:16] of R_TLS with no overflow check
movk x0, #:tprel_g0_nc:foo // bits [15:0] of R_TLS with no overflow check

This type of code sequence is usually used with a large code model.

Differential Revision: https://reviews.llvm.org/D65882

Fixes: PR42853

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