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[AMDGPU] Use three- and five-dword result type in image ops

Description

[AMDGPU] Use three- and five-dword result type in image ops

Some image ops return three or five dwords. Previously, we modeled that
with a 4 or 8 dword register class. The register allocator could
cleverly spot that some subregs were dead and allocate something else
there, but that caused the de-optimization that waitcnt insertion would
think that the result was used immediately.

This commit allows such an image op to have a result with a three or
five dword result, avoiding the above de-optimization.

Differential Revision: https://reviews.llvm.org/D58905

Change-Id: I3651211bbd7ed22721ee7b9fefd7bcc60a809d8b

Details

Committed
tprMar 22 2019, 8:21 AM
Differential Revision
D58905: [AMDGPU] Use three- and five-dword result type in image ops
Parents
rL356756: [clang-tidy] Fix a compiler warning.
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