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[ARM] Add v8m.base pattern for add negative imm

Description

[ARM] Add v8m.base pattern for add negative imm

The v8m.base ISA contains movw, which can operate on an unsigned
16-bit value. Add the pattern that converts an add with a negative
value, that could fit into 16-bits when negated, into a sub with that
positive value.

Differential Revision: https://reviews.llvm.org/D57942

Details

Committed
sam_parkerFeb 11 2019, 3:35 AM
Differential Revision
D57942: [ARM] Add v8m.base pattern for add negative imm
Parents
rL353691: [AMDGPU] Enable DPP combiner pass by default.
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