[docs][AtomicExpandPass] Document the alternate lowering strategy for part-word atomicrmw/cmpxchg
D47882, D48130 and D48131 introduce a new lowering strategy for part-word
atomicrmw/cmpxchg and uses it to lower these operations for the RISC-V target.
Rather than having AtomicExpandPass produce the LL/SC loop in the IR level, it
instead calculates the necessary mask values and inserts a target-specific
intrinsic, which is lowered at a much later stage (after register allocation).
This ensures that architecture-specific restrictions for forward-progress in
LL/SC loops can be guaranteed.
This patch documents this new AtomicExpandPass functionality. See the previous
llvm-dev RFC for more info
Differential Revision: https://reviews.llvm.org/D52234