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[AMDGPU] Add FixupVectorISel pass, currently Supports SREGs in GLOBAL LD/ST

Description

[AMDGPU] Add FixupVectorISel pass, currently Supports SREGs in GLOBAL LD/ST

Add a pass to fixup various vector ISel issues.
Currently we handle converting GLOBAL_{LOAD|STORE}_*
and GLOBAL_Atomic_* instructions into their _SADDR variants.
This involves feeding the sreg into the saddr field of the new instruction.

Details

Committed
ronliebNov 15 2018, 5:13 PM
Parents
rL347007: [CUDA] updated CompileCudaWithLLVM.rst
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