[MachineCSE][GlobalISel] Making sure MachineCSE works mid-GlobalISel (again)


[MachineCSE][GlobalISel] Making sure MachineCSE works mid-GlobalISel (again)

Change of approach, it looks like it's a much better idea to deal with
the vregs that have LLTs and reg classes both properly, than trying to
avoid creating those across all GlobalISel passes and all targets.

The change mostly touches MachineRegisterInfo::constrainRegClass,
which is apparently only used by MachineCSE. The changes are NFC for
any pipeline but one that contains MachineCSE mid-GlobalISel.

NOTE on isCallerPreservedOrConstPhysReg change in MachineCSE:

There is no test covering it as the only way to insert a new pass

(MachineCSE) from a command line I know of is llc's -run-pass option,
which only works with MIR, but MIRParser freezes reserved registers upon
MachineFunctions creation, making it impossible to reproduce the state
that exposes the issue.

Reviwed By: aditya_nandakumar

Differential Revision: https://reviews.llvm.org/D53144