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[AggressiveInstCombine] convert a chain of 'and-shift' bits into masked compare

Description

[AggressiveInstCombine] convert a chain of 'and-shift' bits into masked compare

This is a follow-up to D45986. As suggested there, we should match the "all-bits-set"
pattern in addition to "any-bits-set".

This was a little more complicated than I thought it would be initially because the
"and 1" instruction can be anywhere in the chain. Hopefully, the code comments make
that logic understandable, but if you see a way to simplify or improve that, it's
most appreciated.

This transforms patterns that emerge from bitfield tests as seen in PR37098:
https://bugs.llvm.org/show_bug.cgi?id=37098

I think it would also help reduce the large test from:
D46336
D46595
but we need something to reassociate that case to the forms we're expecting here first.

Differential Revision: https://reviews.llvm.org/D46649

Details

Committed
spatelMay 9 2018, 4:08 PM
Differential Revision
D46649: [AggressiveInstCombine] convert a chain of 'and-shift' bits into masked compare
Parents
rL331936: [lsan] Report unsuspended threads
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