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[Targets] Implement getConstraintRegister for ARM and AArch64

Description

[Targets] Implement getConstraintRegister for ARM and AArch64

Summary:
The getConstraintRegister method is used by semantic checking of
inline assembly statements in order to diagnose conflicts between
clobber list and input/output lists. Currently ARM and AArch64 don't
override getConstraintRegister, so conflicts between registers
assigned to variables in asm labels and clobber lists are not
diagnosed. Such conflicts can cause assertion failures in the back end
and even miscompilations.

This patch implements getConstraintRegister for ARM and AArch64
targets. Since these targets don't have single-register constraints,
the implementation is trivial and just returns the register specified
in an asm label (if any).

Reviewers: eli.friedman, javed.absar, thopre

Reviewed By: thopre

Subscribers: rengolin, eraman, rogfer01, myatsina, kristof.beyls, cfe-commits, chrib

Differential Revision: https://reviews.llvm.org/D45965

Details

Committed
miyukiApr 30 2018, 2:11 AM
Reviewer
thopre
Differential Revision
D45965: [Targets] Implement getConstraintRegister for ARM and AArch64
Parents
rL331163: tsan: disable trace switching after multithreaded fork
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