HomePhabricator

[globalisel][tablegen] Add support for multi-insn emission

Description

[globalisel][tablegen] Add support for multi-insn emission

The importer will now accept nested instructions in the result pattern such as
(ADDWrr $a, (SUBWrr $b, $c)). This is only valid when the nested instruction
def's a single vreg and the parent instruction consumes a single vreg where a
nested instruction is specified. The importer will automatically create a vreg
to connect the two using the type information from the pattern. This vreg will
be constrained to the register classes given in the instruction definitions*.

  • REG_SEQUENCE is explicitly rejected because of this. The definition doesn't constrain to a register class and it therefore needs special handling.

Details

Committed
dsandersNov 1 2017, 12:57 PM
Parents
rL317116: Revert 317016 and 317048
Branches
Unknown
Tags
Unknown