[X86] Replace slow LEA instructions in X86

Description

[X86] Replace slow LEA instructions in X86

According to Intel's Optimization Reference Manual for SNB+:
" For LEA instructions with three source operands and some specific situations, instruction latency has increased to 3 cycles, and must
  dispatch via port 1:
- LEA that has all three source operands: base, index, and offset
- LEA that uses base and index registers where the base is EBP, RBP,or R13
- LEA that uses RIP relative addressing mode
- LEA that uses 16-bit addressing mode "
This patch currently handles the first 2 cases only.

Differential Revision: https://reviews.llvm.org/D32277

Details

Committed
lsabaMay 16 2017, 9:01 AM
Differential Revision
D32277: Replace slow LEA instructions in X86
Parents
rL303182: Revert 303174, 303176, and 303178
Branches
Unknown
Tags
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