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[X86] Improve 64-bit shifts on 32-bit targets (PR14593)

Description

[X86] Improve 64-bit shifts on 32-bit targets (PR14593)

As discussed on PR14593, this patch adds support for lowering to SHLD/SHRD from the patterns generated by DAGTypeLegalizer::ExpandShiftWithKnownAmountBit.

Differential Revision: https://reviews.llvm.org/D23000

Details

Committed
RKSimonJul 31 2016, 12:50 PM
Differential Revision
D23000: [X86] Improve 64-bit shifts on 32-bit targets (PR14593)
Parents
rL277298: [COFF] Expose iterators for ImportAddressTableRVA
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