The patch adds missing registers and instructions to complete all the…

Description

The patch adds missing registers and instructions to complete all the registers supported by the Sparc v8 manual.
These are all co-processor registers, with the exception of the floating-point deferred-trap queue register.
Although these will not be lowered automatically by any instructions, it allows the use of co-processor
instructions implemented by inline-assembly.

Code Reviewed at http://reviews.llvm.org/D17133, with the exception of a very small change in brace placement in SparcInstrInfo.td,
which was formerly causing a problem in the disassembly of the %fq register.

Details

Committed
lerochrisFeb 27 2016, 4:49 AM
Parents
rL262132: [X86][AVX] Added AVX1 target shuffle combine tests
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