CodeGen: TII: Take MachineInstr& in predicate API, NFC
Audit RequiredrL261605
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Description

CodeGen: TII: Take MachineInstr& in predicate API, NFC

Change TargetInstrInfo API to take MachineInstr& instead of
MachineInstr* in the functions related to predicated instructions
(I'll try to come back later and get some of the rest). All of these
functions require non-null parameters already, so references are more
clear. As a bonus, this happens to factor away a host of implicit
iterator => pointer conversions.

No functionality change intended.

Details

Auditors

dsanders

Committed

dexonsmith

Feb 22 2016, 6:46 PM

Parents

rL261604: Revert "Add prefix based function layout when profile is available."

Branches

Unknown

Tags

Unknown

Event Timeline

dexonsmith committed rL261605: CodeGen: TII: Take MachineInstr& in predicate API, NFC.Feb 22 2016, 6:46 PM

Herald added auditors: dsanders. · View Herald TranscriptFeb 22 2016, 6:51 PM

Changes (47)

				Path	Packages
	M			llvm/trunk/include/llvm/Target/TargetInstrInfo.h
	M			llvm/trunk/lib/CodeGen/AggressiveAntiDepBreaker.cpp
	M			llvm/trunk/lib/CodeGen/BranchFolding.cpp
	M			llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.cpp
	M			llvm/trunk/lib/CodeGen/IfConversion.cpp
	M			llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp
	M			llvm/trunk/lib/CodeGen/MachineVerifier.cpp
	M			llvm/trunk/lib/CodeGen/TargetInstrInfo.cpp
	M			llvm/trunk/lib/CodeGen/TargetSchedule.cpp
	M			llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp
	M			llvm/trunk/lib/Target/AMDGPU/R600InstrInfo.cpp
	M			llvm/trunk/lib/Target/AMDGPU/R600InstrInfo.h
	M			llvm/trunk/lib/Target/AMDGPU/R600Packetizer.cpp
	M			llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
	M			llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
	M			llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp
	M			llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
	M			llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
	M			llvm/trunk/lib/Target/ARM/ARMSchedule.td
	M			llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp
	M			llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp
	M			llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.h
	M			llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp
	M			llvm/trunk/lib/Target/BPF/BPFInstrInfo.cpp
	M			llvm/trunk/lib/Target/Hexagon/HexagonBitTracker.cpp
	M			llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
	M			llvm/trunk/lib/Target/Hexagon/HexagonExpandCondsets.cpp
	M			llvm/trunk/lib/Target/Hexagon/HexagonFrameLowering.cpp
	M			llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp
	M			llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.h
	M			llvm/trunk/lib/Target/Hexagon/HexagonNewValueJump.cpp
	M			llvm/trunk/lib/Target/Hexagon/HexagonPeephole.cpp
	M			llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
	M			llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.h
	M			llvm/trunk/lib/Target/Hexagon/RDFGraph.cpp
	M			llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp
	M			llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.h
	M			llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp
	M			llvm/trunk/lib/Target/NVPTX/NVPTXInstrInfo.cpp
	M			llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
	M			llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h
	M			llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp
	M			llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp
	M			llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h
	M			llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
	M			llvm/trunk/lib/Target/X86/X86InstrInfo.h
	M			llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp

CodeGen: TII: Take MachineInstr& in predicate API, NFCAudit RequiredrL261605Actions

Description

Details

Event Timeline

Changes (47)

rL261605

llvm/trunk/include/llvm/Target/TargetInstrInfo.h

llvm/trunk/lib/CodeGen/AggressiveAntiDepBreaker.cpp

llvm/trunk/lib/CodeGen/BranchFolding.cpp

llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.cpp

llvm/trunk/lib/CodeGen/IfConversion.cpp

llvm/trunk/lib/CodeGen/MachineBasicBlock.cpp

llvm/trunk/lib/CodeGen/MachineVerifier.cpp

llvm/trunk/lib/CodeGen/TargetInstrInfo.cpp

llvm/trunk/lib/CodeGen/TargetSchedule.cpp

llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp

llvm/trunk/lib/Target/AMDGPU/R600InstrInfo.cpp

llvm/trunk/lib/Target/AMDGPU/R600InstrInfo.h

llvm/trunk/lib/Target/AMDGPU/R600Packetizer.cpp

llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp

llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h

llvm/trunk/lib/Target/ARM/ARMConstantIslandPass.cpp

llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp

llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

llvm/trunk/lib/Target/ARM/ARMSchedule.td

llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp

llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp

llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.h

llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp

llvm/trunk/lib/Target/BPF/BPFInstrInfo.cpp

llvm/trunk/lib/Target/Hexagon/HexagonBitTracker.cpp

llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp

llvm/trunk/lib/Target/Hexagon/HexagonExpandCondsets.cpp

llvm/trunk/lib/Target/Hexagon/HexagonFrameLowering.cpp

llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp

llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.h

llvm/trunk/lib/Target/Hexagon/HexagonNewValueJump.cpp

llvm/trunk/lib/Target/Hexagon/HexagonPeephole.cpp

llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp

llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.h

llvm/trunk/lib/Target/Hexagon/RDFGraph.cpp

llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.cpp

llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.h

llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp

llvm/trunk/lib/Target/NVPTX/NVPTXInstrInfo.cpp

llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp

llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h

llvm/trunk/lib/Target/Sparc/SparcInstrInfo.cpp

llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.cpp

llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h

llvm/trunk/lib/Target/X86/X86InstrInfo.cpp

llvm/trunk/lib/Target/X86/X86InstrInfo.h

llvm/trunk/lib/Target/XCore/XCoreInstrInfo.cpp

CodeGen: TII: Take MachineInstr& in predicate API, NFC
Audit RequiredrL261605
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