[AArch64]Merge halfword loads into a 32-bit load
This recommits r250719, which caused a failure in SPEC2000.gcc
because of the incorrect insert point for the new wider load.
Convert two halfword loads into a single 32-bit word load with bitfield extract
instructions. For example :
ldrh w0, [x2] ldrh w1, [x2, #2]
ldr w0, [x2] ubfx w1, w0, #16, #16 and w0, w0, #ffff