[MIPS] Add cpu octeon and some instructions
AuditedrL204337

Description

[MIPS] Add cpu octeon and some instructions

The Octeon cpu from Cavium Networks is mips64r2 based and has an extended
instruction set. In order to utilize this with LLVM, a new cpu feature "octeon"
and a subtarget feature "cnmips" is added. A small set of new instructions
(baddu, dmul, pop, dpop, seq, sne) is also added. LLVM generates dmul, pop and
dpop instructions with option -mcpu=octeon or -mattr=+cnmips.

Details

Auditors
dsanders
H39 MIPS Backend Audit Triggered Audit
Committed
redstarMar 20 2014, 4:51 AM
Parents
rL204336: Change the type in va_arg call from char to int.
Branches
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Tags
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dsanders accepted this commit.Mar 21 2014, 8:23 AM