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Reland [llvm-exegesis] Add benchmark latency option on X86 that uses LBR for…

Authored by oontvoo on Jul 27 2020, 9:38 AM.

Description

Reland [llvm-exegesis] Add benchmark latency option on X86 that uses LBR for more precise measurements.

Starting with Skylake, the LBR contains the precise number of cycles between the two
consecutive branches.
Making use of this will hopefully make the measurements more precise than the
existing methods of using RDTSC.

        Differential Revision: https://reviews.llvm.org/D77422

New change: check for existence of field cycles in perf_branch_entry before enabling this mode.
This should prevent compilation errors when building for older kernel whose headers don't support it.

Details

Committed
oontvooJul 27 2020, 9:38 AM
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rG52dd18ab1d38: [gn build] (manually) merge 48c948abeb7
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