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[VE] Support I32/F32 registers in assembler parser

Authored by kaz7 on Jun 2 2020, 1:22 AM.

Description

[VE] Support I32/F32 registers in assembler parser

Summary:
Support I32/F32 registers in assembler parser and add regression tests of LD/ST
instructions.

Differential Revision: https://reviews.llvm.org/D80777

Details

Committed
simollJun 2 2020, 1:22 AM
Differential Revision
D80777: [VE] Support I32/F32 registers in assembler parser
Parents
rG5b8c1ed2c802: [llvm-exegesis] Fix D80610.
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