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AMDGPUUsage DWARF DW_OP_LLVM_call_frame_entry_reg

Authored by t-tye on Feb 18 2020, 11:47 PM.

Description

AMDGPUUsage DWARF DW_OP_LLVM_call_frame_entry_reg

Add DW_OP_LLVM_call_frame_entry_reg DWARF operator for use in CFI to
get the entry value of the EXEC mask for vector register spilling.

Change-Id: Ie6545d4cb410fecd578cc7efafdc56f4ec4d5a65

Details

Committed
t-tyeFeb 19 2020, 10:19 AM
Parents
rG2e45ba0396af: merge master into amd-stg-open
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