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[Mips][Disassembler] When disassembler meets cache/pref instructions for r6 it…

Authored by vmedic on Jan 29 2015, 3:33 AM.

Description

[Mips][Disassembler] When disassembler meets cache/pref instructions for r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method for R6 CACHE_HINT_DESC class that properly handles decoding of these instructions.

llvm-svn: 227430

Details

Committed
vmedicJan 29 2015, 3:33 AM
Parents
rGed76a05c4de2: Add a missing Tag_DIV_use test for Cortex-M7.
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