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[RISCV] Add -mtune support

Authored by Kito Cheng <kito.cheng@sifive.com> on Oct 5 2020, 11:33 PM.

Description

[RISCV] Add -mtune support

  • The goal of this patch is improve option compatible with RISCV-V GCC, -mcpu support on GCC side will sent patch in next few days.
  • -mtune only affect the pipeline model and non-arch/extension related target feature, e.g. instruction fusion; in td file it called TuneFeatures, which is introduced by X86 back-end[1].
  • -mtune accept all valid option for -mcpu and extra alias processor option, e.g. generic, rocket and sifive-7-series, the purpose is option compatible with RISCV-V GCC.
  • Processor alias for -mtune will resolve according the current target arch, rv32 or rv64, e.g. rocket will resolve to rocket-rv32 or rocket-rv64.
  • Interaction between -mcpu and -mtune:
    • -mtune has higher priority than -mcpu for pipeline model and TuneFeatures.

[1] https://reviews.llvm.org/D85165

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D89025

Details

Committed
Kito Cheng <kito.cheng@sifive.com>Oct 15 2020, 10:55 PM
Reviewer
luismarques
Differential Revision
D89025: [RISCV] Add -mtune support
Parents
rG19ae9b6e21e2: [llvm-cov] Fix test cases.
Branches
Unknown
Tags
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Event Timeline

Kito Cheng <kito.cheng@sifive.com> committed rGcfa7094e49cf: [RISCV] Add -mtune support (authored by Kito Cheng <kito.cheng@sifive.com>).Oct 15 2020, 10:55 PM