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[PowerPC] Fix issue where vsrq is given incorrect shift vector

Authored by stefanp on Jan 5 2021, 12:42 PM.

Description

[PowerPC] Fix issue where vsrq is given incorrect shift vector

The new Power10 instruction vsrq was being given the wrong shift vector.
The original code assumed that the shift would be found in bits 121 to 127.
This is not correct. The shift is found in bits 57 to 63.
This can be fixed by swaping the first and second double words.

Reviewed By: nemanjai, #powerpc

Differential Revision: https://reviews.llvm.org/D94113

Details

Committed
stefanpJan 6 2021, 3:56 AM
Reviewer
Restricted Project
Differential Revision
D94113: [PowerPC] Fix issue where vsrq is given incorrect shift vector
Parents
rG816dba48af49: [VPlan] Keep start value in VPWidenIntOrFpInductionRecipe (NFC).
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