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Addition to r216371 (SLP and Loop Vectorization) and r218607 where cost model…

Authored by Suyog Sarda <suyog.sarda@samsung.com> on Nov 10 2014, 11:39 PM.

Description

Addition to r216371 (SLP and Loop Vectorization) and r218607 where cost model for signed division by power of 2 was improved for AArch64. The revision r218607 missed test case for Loop Vectorization. Adding it in this revision.

Differential Revision: http://reviews.llvm.org/D6181

llvm-svn: 221674

Event Timeline

Suyog Sarda <suyog.sarda@samsung.com> committed rGbeb064bd94bc: Addition to r216371 (SLP and Loop Vectorization) and r218607 where cost model… (authored by Suyog Sarda <suyog.sarda@samsung.com>).Nov 10 2014, 11:39 PM