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[RISCV] Make scalable vector FMA commutable for register allocation.

Authored by craig.topper on Feb 8 2021, 9:56 AM.

Description

[RISCV] Make scalable vector FMA commutable for register allocation.

This adds support for commuting operands and converting between
vfmadd and vfmacc to avoid register copies.

To avoid messing up intrinsic behavior, I've added new pseudo
instructions that have the isCommutable flag set. These pseudos also
force a tail agnostic policy. The intrinsic version still use
the tail undisturbed policy.

For best results it looks like we need to start with fmadd and only
pick fmacc if its beneficial. MachineCSE commutes without contraining
the operands and then commutes back if it didn't help with CSE. So
I've made sure that when the operand choice isn't constrained, we
will keep fmadd for MachineCSE and when it does the second commute,
we get back the original instruction.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D95800

Details

Committed
craig.topperFeb 8 2021, 10:05 AM
Reviewer
frasercrmck
Differential Revision
D95800: [RISCV] Make scalable vector FMA commutable for register allocation.
Parents
rG04af72c5423e: [Sanitizer] Fix failing sanitizer tests
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