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[X86][Costmodel] Load/store i16 Stride=6 VF=16 interleaving costs

Authored by lebedev.ri on Sep 28 2021, 9:15 AM.

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[X86][Costmodel] Load/store i16 Stride=6 VF=16 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For this tuple, measuring becomes problematic since there's a lot of spilling going on,
but apparently all these memory ops do not affect worst-case estimate at all here.

For load we have:
https://godbolt.org/z/5qGb9odP6 - for intels Block RThroughput: <=106.0; for ryzens, Block RThroughput: <=34.8
So pick cost of 106.

For store we have:
https://godbolt.org/z/KrWcv4Ph7 - for intels Block RThroughput: =58.0; for ryzens, Block RThroughput: <=20.5
So pick cost of 58.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110593