[AMDGPU] Update DWARF proposal

Authored by t-tye on Feb 19 2020, 11:08 PM.


[AMDGPU] Update DWARF proposal

  • Unify the sections on DWARF expression and location lists.
  • Allow a location description to have one or more single location descriptions.
  • Define context of DWARF expression that includes an initial stack. Allow initial stack to be used when evaluating location list expression with overlapping PC ranges.
  • Reorganize the DWARF proposal in AMDGPUUsage so suitable for submission to the DWARF site.
  • Replace CFI instruction DW_CFA_LLVM_def_cfa_aspace with DW_CFA_def_aspace_cfa and DW_CFA_def_aspace_cfa_sf. This is to avoid the problem that DW_CFA_def_cfa and DW_CFA_def_cfa_sf cannot use a register that is not the size of an address in the CFA address space.
  • Clarify DWARF address class and DWARF address space. Define language values for DWARF address classes and specify how they are used by some common source languages.
  • Define rules for accessing registers and derefencing memory when the type size and register size or byte size operand do not match.
  • Numerous cleanups for consistency.

Differential Revision: https://reviews.llvm.org/D70523


t-tyeApr 14 2020, 5:05 PM
Differential Revision
D70523: [AMDGPU] Update AMDGPUUsage with DWARF proposal
rG1cd92e480c12: Bug where insn-based unwind plans on arm64 could be wrong