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[RISCV] Define vlxe/vsxe/vsuxe intrinsics.

Authored by khchen on Dec 17 2020, 9:30 AM.

Description

[RISCV] Define vlxe/vsxe/vsuxe intrinsics.

Define vlxe/vsxe intrinsics and lower to vlxei<EEW>/vsxei<EEW>
instructions.

We work with @rogfer01 from BSC to come out this patch.

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Zakk Chen <zakk.chen@sifive.com>

Differential Revision: https://reviews.llvm.org/D93471

Details

Committed
khchenDec 19 2020, 6:50 AM
Differential Revision
D93471: [RISCV] Define vlxe/vsxe/vsuxe intrinsics.
Parents
rG9c895aea118a: [ARM] Add clang command line support for -mharden-sls=
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