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[AArch64] Add a GPR64x8 register class

Authored by pratlucas on Nov 12 2020, 2:54 AM.

Description

[AArch64] Add a GPR64x8 register class

This adds a GPR64x8 register class that will be needed as the data
operand to the LD64B/ST64B family of instructions in the v8.7-A
Accelerator Extension, which load or store a contiguous range of eight
x-regs. It has to be its own register class so that register allocation
will have visibility of the full set of registers actually read/written
by the instructions, which will be needed when we add intrinsics and/or
inline asm access to this piece of architecture.

Patch written by Simon Tatham.

Reviewed By: ostannard

Differential Revision: https://reviews.llvm.org/D91774

Details

Committed
pratlucasDec 17 2020, 5:45 AM
Reviewer
ostannard
Differential Revision
D91774: [AArch64] Add a GPR64x8 register class
Parents
rG42b92b31b8b8: [ARM][AArch64] Adding basic support for the v8.7-A architecture
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