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Make sure to maintain register liveness when generating predicated instructions.

Authored by ronl on Sep 2 2016, 3:56 PM.

Description

Make sure to maintain register liveness when generating predicated instructions.

Author: Krzysztof Parzyszek <kparzysz@codeaurora.org>

Differential Revision: https://reviews.llvm.org/D24209

llvm-svn: 280552

Details

Committed
ronlSep 2 2016, 3:56 PM
Differential Revision
D24209: [Hexagon] Add implicit uses when necessary in vector select expansion
Parents
rG534c7028aba6: gitignore: ignore VS Code editor files
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