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[ARM] Add remaining miscellaneous MVE instructions.

Authored by simon_tatham on Jun 25 2019, 4:24 AM.

Description

[ARM] Add remaining miscellaneous MVE instructions.

This final batch includes the tail-predicated versions of the
low-overhead loop instructions (LETP); the VPSEL instruction to select
between two vector registers based on the predicate mask without
having to open a VPT block; and VPNOT which complements the predicate
mask in place.

Reviewers: dmgreen, samparker, SjoerdMeijer, t.p.northover

Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62681

llvm-svn: 364292

Details

Committed
simon_tathamJun 25 2019, 4:24 AM
Differential Revision
D62681: [ARM] Add remaining miscellaneous MVE instructions.
Parents
rGe6824160dd6f: [ARM] Add MVE vector load/store instructions.
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